Operating instructions

Theory of Operation--711387
A Reference
Voltage Source is established by the -+50
volt
supply and R710,R711, and R705 (front-panel
SWP
CAL
adjustment) .
The reference voltage is applied to the
Source Current
Generator stage . Operational
amplifier U722 provides
unity voltage gain and
low output impedance . The output
of U722 is connected through
Q732 to the Timing
Resistors (R741 through R749) .
Timing current is the
result of the
voltage across the Timing Resistors and
flows through the
collector of Q732 to the Ramp
Generator stages
.
RAMP GENERATOR
The Ramp Generator
stages produce a
linear positive
going ramp
for the Output Preamplifier
and Sweep Gate
Generator
stages, and for delay pickoff in the
Logic DVM
(diagram 5) .
Refer to Figure 3-5 .
Upon the
arrival of a high-level
Sweep Start Gate at the
Current Switch stage, Q322
turns on and Q324 turns off .
The source current from Q732
charges the Timing
Capacitors (C332, C334,
C336) in a positive ramp . Field
effect transistors
0334A, Q334B, and transistor 0338
form a unity-gain
Ramp Voltage Follower for the sweep
ramp . The output of
0338 is connected to the
Horizontal
Preamplifier,
Sweep Stop Comparator,
Delay-Time
Comparator,
and Baseline Stabilizer stages .
When the
Sweep Start Gate is
low, Q322 turns off and
Q324
turns on causing the
Timing Capacitors (C332,
C334,
and C336) to
discharge . The Baseline Stabilizer
stage (Q304, 0314)
maintains a constant level from
which the ramp begins .
The output of Q338 is compared
(via Q304A) with
the reference level at the base of
0304B . If the output of Q338
is less than the reference,
Q314 will charge the
timing capacitors through
CR323
until the output
and reference voltages
are equal . If the
output of Q338 is
greater than the reference, Q314
conducts
more and CR323 conducts
less causing the
Timing
Capacitors to discharge through 0324
and R322 .
When
the output and reference
voltages are equal, the
current through CR323
and Q732 equal the current
through Q324 .
HORIZONTAL
PREAMPLIFIER
The Horizontal
Preamplifier stages
connect the
differential sweep
signal to the mainframe and
provide
an offset voltage
for trace positioning . Provisions
are
made
in these stages for sweep
magnification, and a
negative-going
sawtooth signal is
supplied to the
mainframe for sawtooth output
and special plug-in unit
functions . Refer to Figure 3-5
.
The sweep ramp voltage
from Q338 is coupled to the
Horizontal Preamplifier stage
at the base of Q424 .
Transistors Q424 and Q434
form a single-ended to push-
pull converter with Q428
and 0438 as current follower
stages for the push-pull
signal . Output Q448 and Q458
provide final
amplification and connect the
sweep signal
to the
mainframe .
3-
1 0
1 he

MAG

switch,

S435,

increases

the

Horizontal
Preamplifier gain ten times by
connecting R431 and
R430 in parallel with R442 .
The Position
Voltage Source stage combines the do
voltages of the FINE and POSITION controls to produce a
position voltage level at the output of operational
amplifier U416 . This voltage level on the base of
Q434
provides a ramp-waveform-offset voltage to
horizontally
position the displayed trace .
The Auxiliary Sweep Preamplifier stage provides
a
negative-going sweep ramp to the
mainframe (via
interface connector pins A3 and 133)
for sawtooth output
and special plug-in unit functions .
Transistors Q344 and
Q346 form a unity-gain
inverting amplifier for the
sawtooth
signal from the Ramp Voltage Follower Stage .
Diode CR344
provides emitter-base compensation .
SWEEP GATE
GENERATOR
The Sweep
Gate Generator produces an unblanking gate,
at interface
pin A1, for the Z-Axis system of the
mainframe .
When the sweep is displayed, the crt is
unblanked (gate level high) .
The sweep is blanked (gate
level low) between sweeps . Refer to
Figure 3-5 .
The sweep ramp is applied
to the Sweep Stop
Comparator stage . A
reference voltage is set at the base
of 0356 . When
the ramp voltage exceeds the reference
voltage, Q352
turns off and Q356 couples a high level
through
common-base transistor Q358 . The Sweep Stop
Comparator output is coupled to the
Sweep Gate
Generator stage and to the Logic circuit (diagram 3) to
initiate hold off .
The
Z-Axis gate from the Trigger
Generator circuit
(diagram
2) is low at the start of the sweep .
This low level
turns off Q372 . The resultant high-level sweep gate
pulse at the collector of Q372 is coupled
through emitter
follower Q382 to the mainframe for sweep
unblanking .
At
the end of the sweep, the high level
from the Sweep
Stop
Comparator stage turns Q362
off and Q372 on . The
resultant low is coupled
through emitter follower Q382
to the mainframe
for sweep blanking .
DVM
DELAY TIME COMPARATOR
AND DELAY
GATE
GENERATOR
The Delay Time Comparator
(DTC) produces a signal that
goes positive when the
sweep voltage is more positive
than the delay comparison
voltage from the ACO .U1RE-
STOP DELAY control .
The DTC consists of Q51 2B and
Q522A . (Q512A and
0522E are not used because +5V
turns off Q528 via R529 .)
The DTC operates at sweep
speeds from 5 s to 10
Ns/Div . At sweep speeds above 10
ps/Div, a low
level from 0607 (diagram 6) turns Q518
off . When Q518 is turned
off, the DTC does not function,