Operating instructions
TIME/DIVISION
AND
READOUT
SWITCHING
;
The
Readout
Switching
circuits
provide
sweep
rate
and
delay
time
information
to
the
mainframe
readout
system
.
Readout
circuitry
appears
on
the
Time/Division
and
Readout
Switching
diagram
(7)
at
the
rear
of this
manual
.
BASIC
READOUT
SYSTEM
The
readout
system
in
7000-series
mainframes
provides
alpha-numeric
display
of
information
encoded
by
the
plug-in units
.
This
display
is
presented
on
the
crt,
and
is
written
by
the
crt
beam
on
a
time-shared
basis
with
the
analog
waveform
display
.
The
readout
system
produces
a
pulse
train
consisting
of
ten negative-going
pulses
called
time-slots
.
Each
pulse
represents
a
possible
character
in
a
readoutword,
and
is
assigned
a
time-slot
number
corresponding
to
its
position
in
the
word
.
Each
time-slot
pulse
is
directed
to
one
of ten
output
lines,
labeled
fS
1
through
TS
10
(time
slots
one
through
ten),
which
are
connected
to
the
vertical
and
horizontal plug-in
compartments
.
Two
output
lines,
row
and
column,
are
connected
from each
channel
(two
channels
per plug-in
compartment)
back
to
the
readout
system
.
Data
is
encoded
on
these
output
lines
either by
connecting
resistors
betweenthemand
the
time-slot
input
lines
or
by
generating
equivalent
currents
.
The
resultant
output
is
a
sequence
of
analog
current
levels
on
the
row
and
column
output
lines
.
Therow
and
column
current
levels
are
decoded
by
the
readout
system
to
address
a
character
matrix
during
each
time
slot,
thus
selecting
a
character
to
be
displayed
or
a
special
instruction
to
be
followed
.
TIME/DIVISION
READOUT
Theory
of
Operation--71387
Time/Division
readout
is
displayed
on
channel
1
(top
of
the
graticule)
corresponding
to
the
plug-in
compartment
in
which
the
time-base
unit
is
installed
.
The
sweep
rate
is
selected
by
TIME/DIV
switch
S800,
which
also selects
the
resistors
that
determine
the
various
readout
characters
shown
in
Table
3-5
.
ACQUIRE-STOP
DELAY
TIME
READOUT
The
Acquire-Stop
delay
time
is
displayed
on
Channel
2
(bottom
of
graticule)
corresponding
to
the
plug-in
compartment
where
the
71387
is
installed
.
The
Acquire-
Stop
delay
time
is
selected
by
the
ACQUIRE-STOP
DELAY
control,
R535,
as
explained
in
the
Delay
Line
Comparator
and
Delay
Gate
Generator
description
(diagram
5)
.
The
resistors that control
the
various
delay
time
readout
functionsare
shown
in
the
channel
2
portions
of
Table
3-
5
.
Numerical
scaling
for
delay
time
readout
(1,
2,
5
sequence)
is
explained
in
the
Digital
Voltmeter
description
(diagram
3)
.
INTERFACE
CONNECTIONS
AND
POWER
SUPPLY
The
Interface
Connectors
connect
control
signals
and
power
supply
voltages
between
the
mainframe
and
the
time-base
.
The
Power
Supply
derives
supply
voltages
from
the
mainframe
supplies
for
power
requirements
unique
to
this
instrument
.
Additional
voltage
regulation
is
also
provided
within the
71387
.