Data Sheet

Everestek Inc.
www.everestek.biz Page 13
8. Module Pin Definition
Pin
Name
I/O
Function Definition
1
VDD
P
VDD (2.7V~3.6V)
2
DGND
P
System ground
3
CODEC_12M
O
For audio codec system clock
12.288MHz for Fs 48K and 32K, 11.2896MHz for 44.1K
4
P2.0
I/O
GPIO
5
D-
A
USB D-
6
P2.6_PWM
I/O
GPIO or PWM
7
D+
I/O
USB D+
8
P0.2_TXD
I/O
GPIO  UART TXD
9
P0.7_CS
I/O, C
GPIO and SPI chip select for programming internal flash
mode, or Arm Debug port
10
P0.3_RXD
I/O
GPIO or UART RXD, ARM debug port
11
P1.6
I/O
GPIO
12
P1.5_I2S_DaaI2
I/O
GPIO or 2
nd
I2S data input for subwoofer
13
P0.6_SCK
I/O
GPIO and SPI SCK for SPI in programming internal flash
mode, or Arm Debug port
14
P3.2_ADC_IN
I/O, A
GPIO  ADC 
15
P0.5_MISO
I/O, C
General I/O and SPI MISO for SPI in programming
internal flash mode, or Arm Debug port
16
FLASH_PROG
C
Program mode select, active high, default pull low
For programming internal flash memory
Please leave this pin float for normal operation.
17
P0.4_MOSI
I/O, C
GPIO and SPI MOSI for SPI in programming internal flash
mode, or Arm Debug port
18
P0.0_I2C_SCL
I/O
GPIO, I2C clock
19
P0.1_I2C_SDA
I/O
GPIO, I2C data
20
P3.1
I/O
GPIO
21
P3.0
I/O, A
GPIO  ADC 
22
P1.2_I2S_LRCK
I/O
I2S LRCK(input for I2S slave, output for I2S master)
23
DGND
P
Pe gd
24
P1.3_I2S_BCK
I/O
I2S BCK(input for I2S slave, output for I2S master)
25
P1.1_I2S_DIN
I/O
I2S Data in(from audio codec, or from ADC I2S DATA out)
26
P1.0_I2S_DOUT
I/O
I2S Data out(to audio codec, or to DAC I2S DATA in)
Note: P:Power, I/O:GPIO, S:System use only, A:DAC/ADC, C:control