User`s manual

Simulating with the graphic interface
7-208 ModelSim XE Graphic Interface ModelSim Xilinx User’s Manual
The Verilog page includes these options:
• Delay Selection (+mindelays | +typdelays | +maxdelays)
Use the drop-down menu to select timing for min:typ:max expressions.
Also see: "Timing check disabling"
(4-46).
• Additional Search Libraries (-L <library_name>)
Specifies one or more libraries to search for the design unit(s) you wish to
simulate. Type in a library name or use the Browse button to locate a library
within your directories. All specified libraries are added to the drop-down list;
remove the currently selected library from the list with the Remove button.
Make certain your selection is a valid ModelSim library - it must include an
_info file and must have been created from ModelSim’s vlib command
(CR-140).
Pulse Options
• Disable pulse error and warning messages (+no_pulse_msg)
Disables path pulse error warning messages.
• Rejection Limit (+pulse_r/<percent>)
Sets module path pulse rejection limit as percentage of path delay.
• Error Limit (+pulse_e/<percent>)
Sets module path pulse error limit as percentage of path delay.
Other Options
• Enable Hazard Checking (-hazards)
Enables hazard checking in Verilog modules.
• Disable Timing Checks in Specify Blocks (+notimingchecks)
Disables the timing check system tasks ($setup, $hold,...) in specify blocks.
• User Defined Arguments (+<plusarg>)
Arguments are preceded with “+”, making them accessible by the Verilog PLI
routine mc_scan_plusargs. The values specified in this field must have a "+"
preceding them or VSIM may incorrectly parse them.