User manual

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6 Mykerinos-X specifications
6.1 Mykerinos-X Block Diagram
Figure 1 – Mykerinos-X Block Diagram
The Mykerinos-X board is based around the Philips Nexperia PNX1500 Chip running at 300MHz (PNX1700 running at 500MHz for
the X50 version) and its associated 64MB DDR SDRAM running at 400 MHz. The other peripherals are:
• 1 FPGA (Field Programmable Gate Array), used to manage the control signals
• 1 Video PLL, used to lock to any incoming Video reference such as black-burst PAL, NTSC or all trilevel HDTV rates
• 1 stereo 24 bit 192kHz D/A for onboard audio monitoring, also DSD capable.
Up to 64 audio channels are conveyed over the Nexperia high-speed “Video IN” and “Video OUT” buses through connector J4
to/from the specific I/O daughter card.