Service manual

2-16
pin is limited by resistors R3316, R3313, R3306, and R3324. Feedback capacitor C3326 provides
some stability to this high gain stage.
An additional gain control circuit is formed by Q3201 and associated components. Resistors R3206
and R3207 are voltage dividers designed to turn on Q3201 at a significantly higher RSSI level than
the level required to turn on pin diode control transistor Q3301. In order to turn on Q3201, the voltage
across R3207 must be greater or equal to the voltage across R3208 plus the emitter-base voltage
(Vbe) present at Q3201. As current starts flowing into the collector of Q3201, it reduces the bias
voltage at the base of IF amplifier transistor Q3200 and in turn, the gain of the IF amplifier. The gain is
then controlled in a range of -30dB to +10dB.
2.10.4 Frequency Generation Circuit
The frequency generation circuit, shown in Figure 2-12, is composed of two main ICs, the FRACN
synthesizer (U3701), and the VCO/Buffer IC (U3801). Designed in conjunction to maximize
compatibility, the two ICs provide many of the functions that normally would require additional circuits.
The synthesizer block diagram illustrates the interconnect and support circuit used in the region.
Refer to the schematic for the reference designator.
Figure 2-12: VHF Frequency Generation Unit Block Diagram
The synthesizer is powered by regulated 5V and 3.3V which is provided from ICs U3711 and U3201
respectively. The 5V signal is supplied to pins 13 and 30 and the 3.3V signal is applied to pins 5, 20,
34 and 36 of U3701. The synthesizer in turn generates a superfiltered (4.5V) which powers U3801.
In addition to the VCO, the synthesizer must interface with the logic and ASFIC circuitry.
Programming for the synthesizer is accomplished through the data, clock and chip select lines (pins
7, 8 and 9) from the microprocessor, U409. A 3.3V dc signal from the synthesizer lock detect line (pin
4) indicates to the microprocessor that the synthesizer is locked.
Transmit modulation from the ASFIC is supplied to U3701, pin 10. Internally the audio is digitized by
the FRACN and applied to the loop divider to provide low-port modulation. The audio runs through an
internal attenuator for modulation balancing purposes before going out at pin 41 to the VCO.
2.11 Synthesizer
The FRACN Synthesizer, shown in Figure 2-13, uses a 16.8MHz crystal (Y3761) to provide a
reference for the system. The LVFRACTN IC (U3701) further divides this to 2.1MHz, 2.225MHz, and
2.4MHz as reference frequencies. Together with C3761, C3762, C3763, R3761, and D3761, they
build up the reference oscillator that is capable of 2.5 ppm stability over a temperature range of -30 to
85°C. A 16.8MHz signal at U3701, pin 19 is also provided for use by ASFIC and LVZIF.
Synthesizer
U3701
VCOBIC
U3801
Voltage
Multiplier
Dual
Transistor
Loop
Filter
To Mixer
To PA Driver
VCP
Vmult1
Vmult2
Aux3
MOD Out
Modulating
Signal
Rx VCO
Circuit
Tx VCO
Circuit
TRB
16.8 MHz
Ref. Osc.
Rx Out
Tx Out