user manual

General Description
1-7
1
❏
VMEbus interrupter
❏
VMEbus system controller
❏
VMEbus interrupt handler
❏
VMEbus requester
Processor-to-VMEbus transfers can be:
❏
D8
❏
D16
❏
D32
VMEchip2 DMA transfers to the VMEbus, however, can be:
❏
D16
❏
D32
❏
D16/BLT
❏
D32/BLT
❏
D64/MBLT
The PCCchip2 ASIC provides:
❏
Two tick timers
❏
Interface to the LAN chip
❏
SCSI chip
❏
Serial port chip
❏ Parallel (printer) port
❏ BBRAM
The MCECC memory controller ASIC provides the programmable
interface for the ECC-protected DRAM mezzanine board.