user manual

MVME177 Functional Description

4-5

Because only 1M x 8-bit Flash chips are used, there is no user-

configured jumper selection block required to pick the Flash chip

size.

The memory map for the Flash devices is controlled by the

VMEchip2 ASIC. The 32-bit wide Flash can support:

❏ 8 bit

❏ 16 bit, and

❏ 32 bit access

Flash write protection is programmable through the VMEchip2

GPIO register. The address map location of Flash is at $000000

through $3FFFFF at local reset if the FLASHJP jumper (J8) is in,

providing for the all-Flash mode. In the mixed EPROM/Flash

mode, half of the Flash is accessable at addresses $200000 through

$3FFFFF, depending on the condition of the VMEchip2 GPIO2 bit.

Because the MVME177 uses 1M x 8-bit Flash memory devices and

EPROMs with no download ROM, the software programs the

VMEchip2 ROM0 and REV EROM bits properly so that the

Flash/EPROM appears at address $0 after powerup. The hardware

is implemented so that the EPROM/Flash appears at address

$00000000 following a local bus reset.

Table 4-1. EPROM and Flash Control and Conﬁguration

Jumper or Control Bit Control Condition Memory ConÞguration

FLASHJP jumper J8 Jumper in (= low) 2MB EPROM (lower) and 2MB Flash

(upper)

Jumper out (= high) All 4MB Flash

VMEchip2 bit GPIO2 GPIO2 bit low (and

with J8 jumper in)

First 2MB Flash accessible (Note)

GPIO2 bit high (and

with J8 jumper in)

Second 2MB Flash accessible (Note)

Note: These 2MB of Flash will be following the EPROMs in memory if the FLASHJP (J8)

jumper is in, and could be read or write depending on the Flash write protect control.