User manual

ST7 and STM8 addressing modes ST Assembler-Linker
16/89 Doc ID 11392 Rev 4
3.7 Indexed modes
The ST7 supports the following types of indexed mode:
● indexed without offset,
● indexed with an 8-bit unsigned offset (range [0:255]),
● indexed with a 16-bit offset.
In addition to these modes, the STM8 also supports the following indexed mode:
● indexed with a 24-bit offset.
The source code syntax is:
● (X) or (Y) for no-offset indexing.
● (offset,X) or (offset,Y) for indexed with offset.
Some instructions (such as ld A or add) support the first three types of indexed mode.
Some ST7 instructions (such as inc) only support the first two types (that is, indexed
without offset and indexed with 8-bit unsigned offset).
The STM8 instructions (such as inc) support the first three types.
Only the STM8 instruction, ldf, supports the “indexed with 24-bit offset” addressing mode.
Examples:
ld A,(X) ; no-offset mode
ld A,(0,X) ; 8-bit offset mode
ld A,(127,X) ; 8-bit offset mode
ld A,(259,X) ; 16-bit offset mode
ldf A,($FFF00, X) ; 24-bit offset mode (STM8 only)
ld A, ($F5, SP) ; SP indexed mode, 8-bit offset short(STM8 only)
3.8 Relative mode
This addressing mode is used to modify the program counter (PC) register value by adding
an 8-bit signed offset to it (in the range -128 to +127). The relative addressing mode is made
up of two sub-modes:
● relative (direct) where the offset follows the op-code. This is used by the instructions
JRxx, CALLR, and BTJx.
● relative (indirect) where the offset is defined in memory, this address follows the op-
code (ST7 only).
The target label is specified at source code level (the assembler computes the
displacement).
3.9 High, low addressing modes
In some instances, it may be necessary to access the highest part of an address (8 highest
bits) or the lowest part of an address (8 lowest bits) as well.
For this feature in the ST7, the syntax is the following: <expression>, where
<expression> is symbol.H (highest part), or symbol.L (lowest part). Examples:
lab12 equ $0012