Freescale Semiconductor, Inc. TABLE OF CONTENTS Freescale Semiconductor, Inc... CHAPTER 3 DEBUG MONITOR COMMANDS (continued) 3.8 Data Conversion (DC) ...................................................................................................... 3-15 3.9 Dump S-Records (DU) ..................................................................................................... 3-16 3.10 Go Direct (GD) ....................................................................................................
Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... TABLE OF C CHAPTER 1 GENER Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the 1.1 Introduction.................................................. application or use of any product or circuit described herein; neither does it convey any license 1.2 General Description .....................................
Freescale Semiconductor, Inc. TABLE OF CONTENTS Freescale Semiconductor, Inc... LIST OF FIGURES CHAPTER 4 ASSEMBLER/D 4.2.1.3 Disassembled Source Line ....... 4.2.1.4 Mnemonics and Delimiters ...... FIGURES 4.2.1.5 CharacterPAGE Set ............................ 4.2.2 Addressing Modes............................. 1-1. CPU32Bug Operation Mode Flow Diagram ...................................................................... 1-2 4.2.3 Define Constant Directive (DC.W) ... 1-2. BCC Memory Map ..............
Freescale Semiconductor, Inc. TABLE OF CONTENTS CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE APPENDIX A S-RECO Freescale Semiconductor, Inc... 6.1 6.2 Introduction......................................................................................................................... A.1 Introduction.................................................. 6-1 Diagnostic Monitor............................................................................................................. A.2 S-Record Content............
Freescale Semiconductor, Inc. GENERAL INFORMATION NOTE In order for high-baud rate serial communication between CPU32Bug and the terminal to function properly, the terminal must use XON/XOFF handshaking. If messages are garbled and have missing characters, check the terminal to verify XON/XOFF handshaking is enabled. CHAP GENERAL IN Freescale Semiconductor, Inc... 1.1 INTRODUCTION This chapter provides a general description, inst 3. Power up the system.
Freescale Semiconductor, Inc. GENERAL INFORMATION 1.3 USING THIS MANUAL MAIN POWER-UP/RESET Those users unfamiliar with debugging packages CPU32Bug. This provides information about CP Paragraph 1.
Freescale Semiconductor, Inc. GENERAL INFORMATION 1.5.3 Break The BREAK key on the terminal keyboard i interrupt. The only time break is recognized i debugger console. Break removes any breakpoint intact. Break does not, however, take a snapsh target registers. It is useful for terminating activ blocks of data. NO Freescale Semiconductor, Inc... When using terminal emulation Kermit, the BREAK key on the k program and may not be transm emulation program’s user manual BREAK signal to the port connect 1.
Freescale Semiconductor, Inc. GENERAL INFORMATION 1.7 TERMINAL INPUT/OUTPUT CO XXX7FF(2) INTERNAL RAM(1) When entering a command at the prompt, the fo preceding the character, this indicates that the C striking the character key). XXX000 Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION EXAMPLES Valid expressions. Freescale Semiconductor, Inc... Expression Result (in hex) FF0011 FF0011 45+99 DE &45+&99 90 @35+@67+@10 5C %10011110+%1001 A7 88<<10 00880000 AA&F0 A0 CHAP DEBUG MONITO 2.1 INTRODUCTION CPU32Bug performs various operations in respo When the debugger prompt CPU32Bug> appears accept commands. 2.2 ENTERING DEBUGGER COMM The total value of the expression must be between 0 and $FFFFFFFF.
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION 2.2.1.1 Expression as a Parameter The commands use a modified Backus-Naur syntax. The meta-symbols are: An expression is one or more numeric values sep The angular brackets enclose a symbol, known as a syntactic variable. The + plus syntactic variable is replaced in a command line by one of a class of symbols it represents. – minus Freescale Semiconductor, Inc... [] []... | This symbol indicates that a choice is to be made.
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION 2.5.1 CPU32Bug Vector Table and Workspace Table 2-1. Debugger Add CPU32Bug requires 12k bytes of RAM to operate. On power-up or reset, CPU32Bug allocates Formatvector table Example this memory space. The first 1024-bytes are reserved as a user program area and the second 1024-bytes are reserved as an exception vector table Nfor use by the 140debugger.
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION Freescale Semiconductor, Inc... EXAMPLE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ****** ****** A portion of the listing file of a re-locatable 2.2.
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION Before the normal register display information is printed, the EXAMPLE exception type information Trace oneisinstruction using displayed. This includes the type of exception with its format/vector word and the following: Mnemonic Offset SSW Special Status Word +$16 Fault Addr. Faulted Address +$10 Data Data +$0C =2700=TR:OF =5=SD =00000000 =00000000 =00000000 =00000000 MOV +$02 CPU32Bug>T PC =00003006 SR =2700=TR:OF DFC =5=SD Cnt. Reg.
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION EXAMPLE The user exception handle 2.5.2.2 Creating Vector Tables A user program may create a separate vector table to store its exception vectors. If this is done, the user program must change the value of the vector base register to* point to the new vector *** EXCEPT - Exception handler *** table.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS The valid function code mnemonics are: Function Table 3-1. Debug Monitor Commands (continued) Command Mnemonic 0 F0 Paragraph 1 UD Offset Registers Display/Modify 3.22 2 UP Printer Attach/Detach 3.23 3 F3 PF Port Format 3.24 4 F4 RD Register Display 3.25 5 SD Cold/Warm Reset 3.26 6 SP RM Register Modify 3.27 7 CS RS Register Set 3.28 SD Switch Directories 3.29 OF PA/NOPA Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR DESCRIPTION CHAP DEBUG MONITO 3.1 INTRODUCTION Freescale Semiconductor, Inc... This chapter contains descriptions and examples 3-1 summarizes these commands. Table 3-1.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BF BC Block of Memory Fill BF Block of Mem 3.2 BLOCK OF MEMORY COMPAR Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BC Block of Memory Compare BF BC Block of M 3.3 BLOCK OF MEMORY FILL BF [BC 4000:20 4100;B Effective address: 00004000 Effective count : &32 Effective address: 00004100 CPU32Bug> where: and are both express Memory compares, nothing printed options: Freescale Semiconductor, Inc... B – Byte W – Word L – Longword CPU32Bug>MM 410F;B 0000410F 21? 0.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BS Block of Memory Search 3.6 BLOCK OF MEMORY SEARCH BS [;B|W|L] or BM BS Block of Me 3.4 BLOCK OF MEMORY MOVE BM [;B|W|L] Freescale Semiconductor, Inc... BS [] [;B|W|L|N|V] options: B – Byte The BS command searches the specified range of memory for a match with a user-entered data W – Word pattern.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BM Block of Memory Move BR NOBR BM Breakpoi Breakpoin Freescale Semiconductor, Inc... Now suppose the user would like to insert an NOP between the ADD.L instruction and the 3.5 BREAKPOINT INSERT/DELETE ASR.L instruction. Block move the object code down two bytes to make room for the NOP.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BV Block of Memory Verify BS BV Block of Mem Assume memory from $6000 to $602F is as indicated. In all three modes information on matches is out 24 lines of matches are displayed on the screen CPU32Bug>MD 6000:30;B screen indicating there are more lines to display. 00006000 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq the BREAK key to cancel the output and exit the Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS BS Block of Memory Search BV BS Block of Me 3.7 BLOCK OF MEMORY VERIFY CPU32Bug>BS 3000:18,2F2F Effective address: 00003000 Effective count : &24 00003012|2F2F BV [ with count: count is displayedin decimal, and the data where: pattern is found and displayed. Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS DU Dump S-Records DC DU Data Con 3.8 DATA CONVERSION Freescale Semiconductor, Inc... Enter ALT-F1 again to close the log file TEST.MX. The log file contains the extra lines of DC CPU32Bug I "Effective address" and "CPU32Bug", but they will not affect subsequent load (LO) commands, as it keys on the "S" character. The file could be edited to remove the extra lines, if Use the DC command to simplify an expressio so desired.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS DU Dump S-Records DU DU Dump S- 3.9 DUMP S-RECORDS Dump 10 bytes of memory beginning at $3000 to DU [][][][] [;B|W|L] Freescale Semiconductor, Inc... CPU32Bug>DU 3000:&10;B Effective The DU command outputs data from memory in the form of Motorola address: S-records 00003000 to a port Effective count : &10 specified by the user.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS GN Go To Next Instruction GD GN Go Direct (Ignor 3.10 GO DIRECT (IGNORE BREAKP Freescale Semiconductor, Inc... GD [] Use the GN command to trace through the subroutine call and display the results. Use the GD command to start target code execut target PC. Execution starts at the target PC addre inserted.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS GD Go Direct (Ignore Breakpoints) GN GD Go To Next 3.11 GO TO NEXT INSTRUCTION To exit target code, press ABORT pushbutton. Freescale Semiconductor, Inc... GN Exception: Abort PC =0000400E SFC =0=F0 D0 =00052A9C D4 =00000000 A0 =00005000 A4 =00000000 0000400E 60FE CPU32Bug> SR DFC D1 D5 A1 A5 =2711=TR:OFF_S_7_X...C =00000000 Use the GNVBR command to set a temporary breakp =0=F0 USP =0000FC00 SSP* =0000FF50 one following the current instruction.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS GT Go To Temporary BreakpointGO 3.13 GO TO TEMPORARY BREAKPOINT GT Go Execute U 3.12 GO EXECUTE USER PROGRAM GT [:] GO [] Freescale Semiconductor, Inc... Use the GT command to set a temporary breakpoint and start target Use code the GO execution. command A count (alias may G) to initiate target be specified with the temporary breakpoint. Control is given areatenabled. the target If anPC address address.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS GO Go Execute User Program GO Freescale Semiconductor, Inc... Initialize D0, set breakpoints, and start target program: GO Go Execute U Press the ABORT pushbutton on the platform bo D0 =00000000 ? 52A9C.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS HE Help HE HE He 3.14 HELP Freescale Semiconductor, Inc... SD Switch Directory T Trace Instruction HE [] TC Trace on Change of Flow TM Transparent Mode HE is the CPU32Bug help facility. HE displays all available commands and their title TT Trace to Temporary Breakpoint plus any macro commands that have been defined (see macro VE define/display (MA) command).
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MA NOMA Macro Define/Display LO MALoad S-Recor NOMA Macro Delete 3.15 LOAD S-RECORDS FROM HOS 3.16 MACRO DEFINE/DISPLAY/DELETE LO [][][;][= Freescale Semiconductor, Inc... MA [] NOMA [] Use the LO command to download a Motorola to the BCC. The LO command accepts serial memory. The can be any combination of 1-8 alphanumeric characters.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS LO Load S-Records From HostLO Other options: -C EXAMPLES Freescale Semiconductor, Inc... T Suppose a host computer was 1 Ignore checksum. A checksum for the data contained within an S-record* isTest Program. 2 * calculated as the S-record is read in through the port. Normally this calculated 3 65004000 checksum is compared to the checksum contained within the S-record.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MAE Macro Edit MA NOMA MAE Macro Defi Macro EXAMPLES List definitions of macro ABC. The second argument is used whenever the seque the debugger command line would execute the m 1, and ;B replacing "\0", "\1", and "\2", respective CPU32Bug>MA MACRO ABC 010 MD 3000 020 GO \0 CPU32Bug> Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MA NOMA Macro Define/Display MAE MA NOMA Macro Delete Macro Freescale Semiconductor, Inc... 3.17 MACRO EDIT CPU32Bug>MA ASM M=MM \0;DI M= CPU32Bug> Define macro ASM. CPU32Bug>MA MACRO ABC 010 MD 3000 020 GO \0 MACRO ASM 010 MD \0;DI CPU32Bug> List all macros. CPU32Bug>NOMA CPU32Bug> Delete all macros. CPU32Bug>MA NO MACROS DEFINED CPU32Bug> List all macros.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MM Memory Modify MAL NOMAL MM Macro Expansio Macro Expansion 3.20 MEMORY MODIFY 3.18 MACRO EXPANSION LISTING MM [;[[B|W|L][A][N]]|[DI]] MAL MM accepts the Use the MM command (alias M) to examine and change memory locations. NOMAL following data types: Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MD Memory Display MD MD Memory 3.19 MEMORY DISPLAY MD[S] [:|][; [B|W|L|DI]] Use the MD command to display the contents of multiple following data types: Freescale Semiconductor, Inc... Integer Data Type B – Byte CPU32Bug>md 5008;di 00005008 46FC2700 0000500C 61FF0000023E 00005012 4E7AD801 memory locations.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS OF Offset Registers Display/Modify MM OF Memory EXAMPLES Offset register rules: • CPU32Bug>MM 3100 00003100 1234? 00003102 5678? At power-up and cold-start reset, R7 is the automatic register, and all 4321 offset registers 00003104 9ABC? 8765^ have both base and top addresses preset to 0. This disables the offset registers. 00003102 4321? abcd.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS MS Memory Set 3.21 MEMORY SET MS Offset Registers 3.22 OFFSET REGISTERS DISPLAY MS {hexadecimal number}/{’string’} Freescale Semiconductor, Inc... OF OF [Rn[;A]] Use the MS command to write data to memory starting at a specified The OFaddress. command Hexallows numbers the are user to access and not size specific, so they can contain any number of digits (as These allowedregisters by command are used line tobuffer simplify the debu size).
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS PF Port Format OF PF Offset Registers ( the next response demonstrates reversing the prompting order Set ) R0 as the automatic register. CPU32Bug>OF R0;A Backup R0*=00005000 000050FF? Value acceptable, exit interactive. mode. Note: Carriage return not required. Display location 0 relative to the default offset re XON/XOFF protocol [Y,N] = Y? ^ Stop Bits [1,2] = 2? . Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS PA NOPA Printer Attached PF PA NOPA Printer Detached Port F 3.24 PORT FORMAT 3.23 PRINTER ATTACH/DETACH PF [] Freescale Semiconductor, Inc... PA [] NOPA [] Use the PF command to display and change t display a list of the current port assignments, co and configure a new port. The configuration proc PA attach a printer to a specified port. NOPA detaches a printerorfrom a specified the memory (RM port. and When MM commands).
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS RD Register Display PF RD Port F EXAMPLES Freescale Semiconductor, Inc... 3.24.4 New Port Assignment CPU32Bug>rd PC =00003000 SFC =0=F0 D0 =00000000 D4 =00000000 A0 =00000000 A4 =00000000 00003000 424F CPU32Bug> =2700=TR:OFF_S_7_.....
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS RD Register Display RD RD Register 3.25 REGISTER DISPLAY Observe the following when specifying any argu Freescale Semiconductor, Inc... RD {[+|-|=][][/]}{[+|-|=][[-]][/]} • The qualifier is applied to the next reg Use the RD command to display the target state, that is, the register state associated with the • If no qualifier is specified, a + qualifie target program (refer to the GO command).
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS RS Register Set RD RS Register 3.28 REGISTER SET The source and destination function code re mnemonic: Freescale Semiconductor, Inc... RS [][;A] Use the RS command to display or change a single target register. The default offsetCode register Function value is always added to unless overridden by specifically including an offset register. See 0 the OF (offset register) command.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS RESET Cold/Warm Reset 3.26 COLD/WARM RESET RM RESET Register 3.27 REGISTER MODIFY RESET RM Use the RESET command to specify the reset operation level Usewhen the RM a RESET command exception to displayis and change the detected by the processor. Press the RESET switch on the essentially M68300PFB the platform same wayboard as the to MM command, generate a reset exception. control the display/change session.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS T Trace SD T Switch Di 3.29 SWITCH DIRECTORIES Trace the next two instructions: Freescale Semiconductor, Inc... SD CPU32Bug>T 2 PC =00007006 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007006 E289 PC =00007008 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007008 66FA CPU32Bug> SR DFC D1 D5 A1 A5 SR DFC D1 D5 A1 A5 =2700=TR:OFF_S_7_.....
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS T Trace T T Tra 3.30 TRACE Display target registers and trace one instruction: Freescale Semiconductor, Inc... T [] CPU32Bug>RD PC display =00007000 SR after =2700=TR:OFF_S_ Use the T command to execute one instruction at a time and the target state SFC =0=F0 DFC =0=F0 execution. T starts tracing at the address in the target PC.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS TT Trace To Temporary Breakpoint TC TT Trace On Change 3.33 TRACE TO TEMPORARY BREAKPOINT 3.31 TRACE ON CHANGE OF CONT Freescale Semiconductor, Inc... TT TC [] Use the TT command to set a temporary breakpoint at a specified Use the TC address command and trace to start untilexecution at the encountering a 0 count breakpoint.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS TC Trace On Change Of Control Flow TM TC Transpare 3.32 TRANSPARENT MODE Trace on change of flow: Freescale Semiconductor, Inc... TM [][] CPU32Bug>TC 00007008 66FA PC =00007004 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007004 D401 CPU32Bug> SR DFC D1 D5 A1 A5 BNE.B $7004 The TM command connects the console serial p =2700=TR:OFF_S_7_..... VBR to communicate with=00000000 a host computer.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory TT VE Trace To Tempo Then converted into an S-Record file named TEST.MX as follows: Trace to temporary breakpoint: Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory VE VE Verify S-Records 3.34 VERIFY S-RECORDS AGAINST MEMORY Freescale Semiconductor, Inc... host system does not echo characters that the f VE [][][;][=] header record. The header record is not used, bu VE out of the loop so that data records are proces VE is identical to the LO command with the exception that data is not stored to memory but merely compared to the contents of memory.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER 4.1.2 M68300 Family Resident Structured Assembler Comparison VE Verify S-Records There are several major differences between the CPU32Bug assembler and the M68300 Family resident structured assembler. The resident assembler is a two-pass assembler that processes an entire program as a unit, while the CPU32Bug assembler processes linethe of program a program as an and perform Noweach change in memory individual unit.
Freescale Semiconductor, Inc. DEBUG MONITOR COMMANDS CHAP ASSEMBLER/D 4.1 INTRODUCTION Freescale Semiconductor, Inc... Included as part of the CPU32Bug firmware is a assembler is an interactive assembler/editor in source line is translated into M68300 Family m into memory as it is entered. In order to display a and the instruction mnemonic and operands are d are translated. The CPU32Bug assembler is effectively a sub assembler.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER 4.2.1.5 Character Set 4.2.1 Source Line Format Freescale Semiconductor, Inc... The character set recognized by the CPU32Bug assembler is a subset Each of source ASCII statement and listedisbelow: a combination of op numbers, labels and comments are not used.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER Freescale Semiconductor, Inc... 4.2.1.2 Operand Field 4.2.1.4 Mnemonics and Delimiters If present, the operand field follows the operation field and is separated from the operation field The assembler recognizesseparate all M68300 Family ins by at least one space. When two or more operand subfields appear within a statement, binary, octal, decimal, and hexadecimal, with hex them with a comma.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER EXAMPLES 00010022 00010024 00010026 00010028 0001002A Freescale Semiconductor, Inc... 4.2.4 04D2 AAFE 4142 5443 0043 DC.W DC.W DC.W DC.W DC.W DESCRIPTION Table 4-1 summarizes the CPU32Bug one-line as 1234 &AAFE ’AB’ ’TB’+1 ’C’ Decimal number Hexadecimal number Table 4-1.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER Allowed operators are: Freescale Semiconductor, Inc... Addition Subtraction Multiply Divide Shift left Shift right Bitwise or Bitwise and When specifying operands, the user may skip modes.
Freescale Semiconductor, Inc. SYSTEM CALLS Freescale Semiconductor, Inc... It is necessary to create an equate file with the routine names equated to their respective codes, or 4.3.1FREEWARE ExecutingBulletin the Assembler/Disassembler download the archive file C32SCALL.ARC from the Motorola Board (BBS). For more information on the FREEWARE BBS, reference customer letter The assembler/disassembler is actuated using th M68xxxEVx/L2.
Freescale Semiconductor, Inc. ASSEMBLER/DISASSEMBLER 4.3.3 Entering Branch and Jump Addresses When entering a source line containing a branch instruction (BRA, BGT, BEQ, etc) do not enter the offset to the branch’s destination in the instruction operand field. The offset is calculated by the assembler. The user must append the appropriate size extension to the branch instruction. CHAP SYSTEM To reference a current location in an operand expression use the5.1 asterisk (*) character.
Freescale Semiconductor, Inc. SYSTEM CALLS .CHANGEV .CHANGEV Parse Value, Assign to Variable Table 5-1. CPU32Bug If the above code was called with a syscall routine and BUFFER contained ’’1 3’’ in pointer/count Function Trap Code format and POINT contained 2 (longwords), then COUNT would be assigned the value 3, and $0064 POINT would contain 4 (pointing to first character past 3). Note that.
Freescale Semiconductor, Inc. SYSTEM CALLS .BINDEC 5.2.1 Calculate BCD Equivalent Specified Binary .CHANGEV Number .BINDEC Parse Value, As Calculate BCD Equivalent Specified Binary Number5.2.2 SYSCALL .BINDEC TRAP CODE: $0064 Parse Value, Assign to Variable SYSCALL .CHANGEV TRAP CODE: $0067 Freescale Semiconductor, Inc... This function takes a 32-bit unsigned binary number and changes Parse a itvalue to itsinequivalent the user specified BCD buffer. If t (Binary Coded Decimal Number).
Freescale Semiconductor, Inc. SYSTEM CALLS .ERASLN 5.2.6 Erase Line Erase Line .CHKBRK.ERASLN 5.2.3 SYSCALL .ERASLN TRAP CODE: $0027 Check fo Check for Break SYSCALL .CHKBRK TRAP CODE: $0005 Freescale Semiconductor, Inc... Use .ERASLN to erase the line at the present cursor position. Returns zero (0) status in condition code registe port. Entry Conditions: Entry Conditions: No arguments required.
Freescale Semiconductor, Inc. SYSTEM CALLS .DELAY 5.2.4 Timer Delay Function Timer Delay Function .DIVU32 5.2.5 Freescale Semiconductor, Inc... SYSCALL .DELAY TRAP CODE: $0043 .DELAYUnsigned 32 x Unsigned 32 x 32 Bit Divide SYSCALL .DIVU32 TRAP CODE: $006A Divide two 32-bit unsigned integers and return integer. The case of division by zero is handl The .DELAY function generates timing delays based on the processor clock. This function uses $FFFFFFFF. the MCU periodic interrupt timer for operation.
Freescale Semiconductor, Inc. SYSTEM CALLS .MULU32 Unsigned 32 x 32 Bit Multiply.INCHR 5.2.10 Unsigned 32 x 32 Bit Multiply 5.2.7 SYSCALL .MULU32 TRAP CODE: $0069 .MULU32 Input Charac Input Character Routine SYSCALL .INCHR TRAP CODE: $0000 Freescale Semiconductor, Inc... Multiply two 32-bit unsigned integers and return the product on Reads the astack character as a 32-bit from the unsigned default input port. Th integer. No overflow checking is performed.
Freescale Semiconductor, Inc. SYSTEM CALLS .INLN 5.2.8 Input Line Routine Input Line Routine SYSCALL TRAP CODE: .INSTAT 5.2.9 .INLN $0002 .INLN Input Serial Input Serial Port Status SYSCALL .INSTAT TRAP CODE: $0001 Reads a line from the default input port. The minimum buffer size Checks is 256the bytes. default input port buffer for charact result of the operation. Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. SYSTEM CALLS .READLN Read Line to Fixed-Length Buffer .OUTCHR.READLN Output Chara 5.2.14 Read Line to Fixed-Length Buffer 5.2.11 Output Character Routine Freescale Semiconductor, Inc... SYSCALL .READLN TRAP CODE: $0004 SYSCALL .OUTCHR TRAP CODE: $0020 Reads a string of characters from the default input port. Characters Outputsecho a character to the default to the default output output port. port.
Freescale Semiconductor, Inc. SYSTEM CALLS .OUTLN .OUTSTR Output String Using Pointers.PCRLF .OUTLN Print Carriage Retu .OUTSTR 5.2.13 Print Carriage Return and Line Feed 5.2.12 Output String Using Pointers SYSCALL .PCRLF TRAP CODE: $0026 SYSCALL .OUTLN TRAP CODE: $0022 .PCRLF sends a carriage return and a line feed to Freescale Semiconductor, Inc... SYSCALL .OUTSTR TRAP CODE: $0021 Entry Conditions: No arguments or stack allocation r .
Freescale Semiconductor, Inc. SYSTEM CALLS .STRCMP Compare Two Strings 5.2.18 Compare Two Strings SYSCALL 5.2.15 Read String Into Variable-Length Buf .STRCMP SYSCALL TRAP CODE: $0068 Freescale Semiconductor, Inc... .READSTR .STRCMP Read String Into Var .READSTR TRAP CODE: $0003 An equality comparison is made and a boolean flag is returned Reads to the caller. a stringIf of thecharacters strings arefrom not the default inp identical the flag is $00, otherwise it is $FF.
Freescale Semiconductor, Inc. SYSTEM CALLS .RETURN Return to CPU32Bug 5.2.16 Return to CPU32Bug .SNDBRK.RETURN Send B 5.2.17 Send Break SYSCALL .RETURN TRAP CODE: $0063 SYSCALL .SNDBRK TRAP CODE: $0029 Freescale Semiconductor, Inc... .RETURN restores control to CPU32Bug from the target Use program. .SNDBRK First, toany sendbreakpoints a break to the default outp inserted in target code are removed. Then the target state is saved in the register image area. Finally, the routine returns to CPU32Bug.
Freescale Semiconductor, Inc. SYSTEM CALLS .TM_STR0 Start Timer at T=0 .TM_INI .TM_STR0 Timer Init 5.2.19 Timer Initialization MOVE.L SYSCALL #$00000002,-(A7) .TM_STR0 Reset the timer to zero and start it with the default control value (PICR) and a period SYSCALL value (PITR) of $0002 (=244 .TM_INI usec/interrupt). TRAP CODE: $0040 MOVE.L SYSCALL #$054400A0,-(A7) .TM_STR0 Use .TM_INI to initialize the MCU periodic inte initializes it. .
Freescale Semiconductor, Inc. SYSTEM CALLS .TM_RD Read Timer 5.2.20 Read Timer Start Tim 5.2.21 Start Timer at T=0 SYSCALL .TM_RD TRAP CODE: $0042 Freescale Semiconductor, Inc... .TM_STR0 .TM_RD SYSCALL .TM_STR0 TRAP CODE: $0041 Use this routine to read the timer value (the timer value isUse the this number routine of to interrupt reset the pulses timer to 0 and sta generated). Initialize (.TM_INI) and start (.TM_STR0) the timer periodic before interrupt usingtimer the (periodic .
Freescale Semiconductor, Inc. SYSTEM CALLS .WRITE .WRITELN Output String Using Character Count .WRITD .WRITE .WRITDLN .WRITELN Output Strin 5.2.22 Output String with Data . . . . . prints this message: MOTOROLA QUALITY! Freescale Semiconductor, Inc... Using .WRITELN instead of .WRITE outputs this message: MOTOROLA QUALITY! SYSCALL .WRITD TRAP CODE: $0028 – Output SYSCALL .WRITDLN TRAP CODE: $0025 – Output These trap functions use the monitor I/O ro embedded variable fields. .
Freescale Semiconductor, Inc. SYSTEM CALLS .WRITD .WRITDLN Output String with Data .WRITE ..WRITD Output String Using .WRITELN .WRITDLN 5.2.23 Output String Using Character Count EXAMPLE SYSCALL .WRITE TRAP CODE: $0023 The following section of code ..... Freescale Semiconductor, Inc... ERRMESSG DC.B MOVE.L PEA PEA SYSCALL TST.L – Outpu $15,’ERROR CODE = ’,’|10,8Z|’ SYSCALL .
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE 6.2.13 Zero Pass Count (ZP) Executing this command resets the pass counter DP to zero. This is frequently desirable before entering a command that executes the loop-continue mode. Entering this command on the same line as LC results in the pass counter being reset every pass. CHAP DIAGNOSTIC FIR Freescale Semiconductor, Inc... 6.3 UTILITIES 6.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE To execute a particular test, for example CPU, enter CPU X 6.2.7 (X = the Stop-On-Error desired sub-command). Mode (SE) This command causes the monitor to find the CPU subdirectory, and then execute the specified Use the stop-on-error mode (SE) to halt a test a command from that subdirectory. then the test mnemonic to stop on errors encount 6.2.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE CPU B Instruction Test 6.3.2 Read Loop CPU B RL. [ [ 6.4.2 Instruction Test The RL command executes a streamlined rea location. This command is intended as a debugg CPU32Diag>CPU B The read loop is very short in execution so me utilized shift in tracking failures.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE CPU CPU Tests For The MCU CPU A CPU Registe 6.4.1 Register Test 6.4 CPU TESTS FOR THE MCU Freescale Semiconductor, Inc... CPU tests are a series of diagnostics used to test the CPU portion of CPU32Diag>CPU the BCC MCU, asAlisted below (Table 6-1). CPU A executes a thorough test of all the regis bits stuck high or low. Table 6-1.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE The following describes the memory error display format for memory CPUtests CE through J. The error reporting code is designed to conform to two rules: Address M 1. The first time an error occurs, headings are printed out prior to the printing of the 6.4.3 Address Mode Test values. Freescale Semiconductor, Inc... 2. Upon 20 memory errors, the printing of error messages ceases CPU32Diag>CPU for the remainderCof the test.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE CPU D Exception Processing Test MT 6.4.4 Exception Processing Test CPU D Memory 6.5 MEMORY TESTS (MT) CPU32Diag>CPU D Freescale Semiconductor, Inc... The memory tests are a series of diagnostics wh that may or may not reside on the M68300EVS CPU D tests many of the exception processing routines of theRAM. MCU, To but test not off-board the interrupt auto change Start a RAM, vectors or any of the floating point co-processor vectors.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT D Set Bus Data Width 6.5.4 Set Bus Data Width MT A MT D Set Funct 6.5.1 Set Function Code CPU32Diag>MT D [new value: 0 for 16, 1 for 32] CPU32Diag>MT A [new value] MT D selects either 16-bit or 32-bit bus data accesses during the MTM68CPU32Bug A allows the user MT to memory select the function code tests. The width is selected by entering zero for 16 bits or one for this 32are bits. Program Test and TAS Test. Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT B Set Start Address 6.5.2 Set Start Address MT B Set Stop 6.5.3 Set Stop Address CPU32Diag>MT B [new value] Freescale Semiconductor, Inc... MT C CPU32Diag>MT C [new value] MT B allows the user to select the start address used by all MTofCthe allows memory the user tests. to select For the the stop address u MVME332, it is suggested that address $00003000 be used.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT H Random Byte Test 6.5.8 Random Byte Test MT E MT H March Add 6.5.5 March Address Test CPU32Diag>MT H CPU32Diag>MT E Freescale Semiconductor, Inc... MT H performs a random byte test from Start Address to Stop MT Address. E performs The random a march byte address testtest from Start A has been implemented in this manner: has been implemented in this manner: 1. A register is loaded with the value $ECA86420. 1.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT F Walk a Bit Test 6.5.6 Walk a Bit Test MT G MT F Refres 6.5.7 Refresh Test CPU32Diag>MT F CPU32Diag>MT G MT F performs a walking bit test from start address to stop address. MT G Theperforms walking abitrefresh test fortest each from Start Addr memory location is implemented in the following manner: implemented in this manner: • Freescale Semiconductor, Inc... • • Write out a 32-bit value with only the lower bit set. 1.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT I Program 6.5.9 Program Test CPU32Diag>MT I MT I moves a program segment into RAM and e Freescale Semiconductor, Inc... 1. The program is moved into the RAM the available RAM (i.e., from Start segments of the program are moved segment copied into the RAM to S Attempting to run this test without su one complete program segment to be out: INSUFFICIENT MEMORY. 2. The last location, Stop Address, receiv 3.
Freescale Semiconductor, Inc. DIAGNOSTIC FIRMWARE GUIDE MT J Test and Set Test 6.5.10 Test and Set Test BERR MT J Bus Err 6.6 BUS ERROR TEST CPU32Diag>MT J CPU32Diag>BERR Freescale Semiconductor, Inc... MT J performs a Test and Set (TAS) test from Start Address toBERR Stop Address. each and global b tests for The localtest busfortime-out memory location is implemented as follows: following: • Clear the memory location to 0.
Freescale Semiconductor, Inc. S-RECORD INFORMATION The next 16 character pairs of the first S1 record are the ASCII bytes of the actual program code/data. In this assembly language example, the hexadecimal opcodes of the program are written in sequence in the code/data fields of the S1 records: APPEN Freescale Semiconductor, Inc... S-RECORD IN OPCODE INSTRUCTION 285F 245F 2212 226A0004 24290008 237C MOVE.L MOVE.L MOVE.L MOVE.L MOVE.L MOVE.L A.
Freescale Semiconductor, Inc. S-RECORD INFORMATION Each record may be terminated with a CR/LF/NULL. Additionally, an S-record may have an S-RECORDS CREATION initial field to accommodate other data such as line numbers A.4 generated by some time-sharing systems. An S-record file is a normal ASCII text file in the operating system in which it resides. S-record format files may be produced by du assemblers or cross linkers.
Freescale Semiconductor, Inc. USER CUSTOMIZATION C.2 CPU32BUG CUSTOMIZATION APPEN The general procedure for customizing CPU32Bug is as follows: 1. SELF-TEST ERR Copy the parameter area from the CPU32Bug EPROM to RAM by entering the following command: CPU32Bug>BM E0000 E01FF 4000 Freescale Semiconductor, Inc... 2. B.1 INTRODUCTION Modify the parameters in RAM using the offsets shown in TableorC-1.
Freescale Semiconductor, Inc. SELF-TEST ERROR MESSAGES APPEN Table B-1. Self-Test Error Messages (continued) Test Type and Error Message Failure Description USER CUSTO ROM Test: ERROR $20 @ $000EXXXX, CONFIDENCE TEST FAILED C.1 INTRODUCTION Odd CODESIZE Within Checksum the CPU32Bug error certain operating parame situation.
Freescale Semiconductor, Inc. USER CUSTOMIZATION 6. Verify the customized S-record file, below. The -DC000 offset is require base address of the S-records to the R Table C-1. CPU32Bug Customization Area (continued) CPU32Bug>VE -DC000 Offset Default Value Mnemonic Description Enter the terminal emulator’s escape Freescale Semiconductor, Inc... Common Chip Select Table: (Rev. A BCC + Rev. A PFB) & system (ALT-F4 for ProComm). The (Rev. B BCC + Rev.
Freescale Semiconductor, Inc. USER CUSTOMIZATION 9. TABLE Power up the newly programmed BCC and noteC.3 the CUSTOMIZATION checksum value indicated. Repeat steps 1 through 8 above, to set the checksum to this value but with the changes noted below. The CODESIZE parameter at offset $08 can be altered to makeC-1. CPU32Bug Table the checksum valid only over the CPU32Bug half of the EPROM so user code in the Offsetis simply Default Value on the Mnemonic second half can be freely changed.
Freescale Semiconductor, Inc. USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Table C-1. CPU32Bug Cust Description Offset Default Value $70 $06 Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Table C-1. CPU32Bug Cust Description Offset Default Value ROM AUTO BOOT VECTORS Freescale Semiconductor, Inc... $78-7B $7C-7F $FFFFFFFF $FFFFFFFF RB_SP RB_PC Mnemonic Console Default Table for S ROM auto boot stack pointer $88 value $01 .STOP ROM auto boot program counter value: Bit 0 = 1 disables auto boot (odd address) $89boot (even $FFaddress). .
Freescale Semiconductor, Inc. USER CUSTOMIZATION C.4 COMMUNICATION FORMATS Table C-1.C-2 CPU32Bug Cust Not all combinations of data bits, parity, and stop bits are valid for the MCU SCI. Table details the legal combinations that can be used when customizing CPU32Bug. Offset Default Value Mnemonic Initializati Freescale Semiconductor, Inc... $D0-16F all $FF’s INITTBL Initia The Initialization Table is organized as following format: < 4 1 0|1 Table C-2.
Freescale Semiconductor, Inc. USER CUSTOMIZATION Table C-1. CPU32Bug Cust Offset Default Value Mnemonic Table C-1. CPU32Bug Customization Area (continued) Sign On Te Initialization Tables (continued) Freescale Semiconductor, Inc... $1701FFas output, SIGNON Text This entry format aligns with the normal assembler DC.W and DC.L are automatically aligned on an an even address (word) boundary, as seen in the examples below. Thus the byte is handled automatically by the assembler.
Freescale Semiconductor, Inc. USER CUSTOMIZATION C.8 PLATFORM BOARD (PFB) REV. C COMPATIBILITY C.5 BCC REV. A CHIP SELECTION PFB Rev. C boards have jumpers (J8 - J13) which whenTable installed, C-3 covers make Rev. Rev.ACof PFB’s the M68332BCC Bu compatible with Rev. A, Rev. B or Rev. C BCC boards . WhenPlatform switching Board. jumpers from Rev. A to Rev. B or C compatibility on a Rev. C PFB, all jumpers must be set to the same selection. Table C-3. Rev. A Chi Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. USER CUSTOMIZATION C.6 BCC REV. B CHIP SELECTION SUMMARYC.7 BCC REV. C CHIP SELECTION Table C-4 covers Rev. B of the M68332BCC Business Card The Computer table belowand covers M68332PFB Rev. C of the M68332B Platform Board. Platform Board. Table C-5. BCC Rev. C C Signal Table C-4. Rev. B Chip Selection Summary Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc. USER CUSTOMIZATION Q: How can I get CPU32Bug to automatically execute my user C.9 program upon power QUESTIONS up? CPU32BUG AND AN Freescale Semiconductor, Inc... A: Use the ROM Auto Boot Vectors (RB_SP and RB_PC) to implement a turn-key system How can I change the chip selections to fit m whereby CPU32Bug initializes itself and then loads the stackQ:pointer (SSP) and program counter (PC), thus starting execution of the user’s program.
Freescale Semiconductor, Inc. USER CUSTOMIZATION Freescale Semiconductor, Inc... Q: How can I change the Periodic Interrupt Timer (PIT) "tick" time for the SYSCALL timing change for an ext Q: After I made the parameter functions? on header P2 by jumping pin 28 to 64, nothin signon message appears. Why doesn’t it work A: Change the Periodic Interrupt Timer .PITR parameter to alter the "tick" count. This A: The routine.