Typewriter User Manual

5- 6 MC68340 USER’S MANUAL MOTOROLA
Table 5-1. Instruction Set
Mnemonic Description Mnemonic Description
ABCD Add Decimal with Extend MOVEA Move Address
ADD Add MOVE CCR Move Condition Code Register
ADDA Add Address MOVE SR Move to/from Status Register
ADDI Add Immediate MOVE USP Move User Stack Pointer
ADDQ Add Quick MOVEC Move Control Register
AND Logical AND MOVEM Move Multiple Registers
ANDI Logical AND Immediate MOVEP Move Peripheral Data
ASL Arithmetic Shift Left MOVEQ Move Quick
ASR Arithmetic Shift Right MOVES Move Alternate Address Space
Bcc Branch Conditionally (16 Tests) MULS Signed Multiply
BCHG Bit Test and Change MULU Unsigned Multiply
BCLR Bit Test and Clear NBCD Negate Decimal with Extend
BGND Enter Background Mode NEG Negate
BKPT Breakpoint NEGX Negate with Extend
BRA Branch Always NOP No Operation
BSET Bit Test and Set NOT Ones Complement
BSR Branch to Subroutine OR Logical Inclusive OR
BTST Bit Test ORI Logical Inclusive OR Immediate
CHK Check Register against Bounds PEA Push Effective Address
CHK2 Check Register against Upper and RESET Reset External Devices
Lower Bounds ROL, ROR Rotate Left and Right
CLR Clear Operand ROXL, ROXR Rotate with Extend Left and Right
CMP Compare RTD Return and Deallocate
CMPA Compare Address RTE Return from Exception
CMPI Compare Immediate RTR Return and Restore
CMPM Compare Memory RTS Return from Subroutine
CMP2 Compare Register against Upper SBCD Subtract Decimal with Extend
and Lower Bounds Scc Set Conditionally
DBcc Test Condition, Decrement and STOP Stop
Branch (16 Tests) SUB Subtract
DIVS, DIVSL Signed Divide SUBA Subtract Address
DIVU, DIVUL Unsigned Divide SUBI Subtract Immediate
EOR Logical Exclusive OR SUBQ Subtract Quick
EORI Logical Exclusive OR Immediate SUBX Subtract with Extend
EXG Exchange Registers SWAP Swap Data Register Halves
EXT, EXTB Sign Extend TAS Test and Set Operand
ILLEGAL Take Illegal Instruction Trap TBLS, TBLSN Table Lookup and Interpolate,
JMP Jump Signed
JSR Jump to Subroutine TBLU, TBLUN Table Lookup and Interpolate,
LEA Load Effective Address Unsigned
LINK Link and Allocate TRAPcc Trap Conditionally (16 Tests)
LPSTOP Low-Power Stop TRAPV Trap on Overflow
LSL, LSR Logical Shift Left and Right TST Test
MOVE Move UNLK Unlink
Frees
cale Semiconductor,
I
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