Typewriter User Manual

5- 24 MC68340 USER’S MANUAL MOTOROLA
5.3.3.4 LOGIC INSTRUCTIONS. The logical operation instructions (AND, OR, EOR, and
NOT) perform logical operations with all sizes of integer data operands. A similar set of
immediate instructions (ANDI, ORI, and EORI) provide these logical operations with all
sizes of immediate data. The test (TST) instruction arithmetically compares the operand
with zero, placing the result in the CCR. Table 5-6 summarizes the logical operations.
Table 5-6. Logic Operations
Instruction
Operand
Syntax Operand Size Operation
AND 〈ea〉, Dn
Dn, 〈ea〉
8, 16, 32
8, 16, 32
Source Λ Destination ⇒ Destination
ANDI #〈data〉, 〈ea〉 8, 16, 32 Immediate Data Λ Destination ⇒ Destination
EOR Dn, 〈ea〉 8, 16, 32 Source ⊕ Destination ⇒ Destination
EORI #〈data〉, 〈ea〉 8, 16, 32 Immediate Data ⊕ Destination ⇒ Destination
NOT 〈ea〉 8, 16, 32 Destination ⇒ Destination
OR 〈ea〉, Dn
Dn, 〈ea〉
8, 16, 32
8, 16, 32
Source V Destination ⇒ Destination
ORI #〈data〉, 〈ea〉 8, 16, 32 Immediate Data V Destination ⇒ Destination
TST 〈ea〉 8, 16, 32 Source – 0, to set condition codes
5.3.3.5 SHIFT AND ROTATE INSTRUCTIONS. The arithmetic shift instructions, ASR and
ASL, and logical shift instructions, LSR and LSL, provide shift operations in both
directions. The ROR, ROL, ROXR, and ROXL instructions perform rotate (circular shift)
operations, with and without the extend bit. All shift and rotate operations can be
performed on either registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count may be
specified in the instruction operation word (to shift from 1 to 8 places) or in a register
(modulo 64 shift count).
Memory shift and rotate operations shift word-length operands one bit position only. The
SWAP instruction exchanges the 16-bit halves of a register. Performance of shift/rotate
instructions is enhanced so that use of the ROR and ROL instructions with a shift count of
eight allows fast byte swapping. Table 5-7 is a summary of the shift and rotate operations.
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