Typewriter User Manual

5- 28 MC68340 USER’S MANUAL MOTOROLA
Table 5-11. System Control Operations
Instruction
Operand
Syntax Operand Size Operation
Privileged
ANDI #〈data〉, SR 16 Immediate Data Λ SR ⇒ SR
EORI #〈data〉, SR 16 Immediate Data ⊕ SR ⇒ SR
MOVE 〈ea〉, SR
SR, 〈ea〉
16
16
Source ⇒ SR
SR ⇒ Destination
MOVEA USP, An
An, USP
32
32
USP ⇒ An
An ⇒ USP
MOVEC Rc, Rn
Rn, Rc
32
32
Rc ⇒ Rn
Rn ⇒ Rc
MOVES Rn, 〈ea〉
〈ea〉, Rn
8, 16, 32 Rn ⇒ Destination using DFC
Source using SFC ⇒ Rn
ORI #〈data〉, SR 16 Immediate Data V SR ⇒ SR
RESET none none Assert RESET line
RTE none none (SP) ⇒ SR; SP + 2 ⇒ SP; (SP) ⇒ PC; SP + 4 ⇒
SP; restore stack according to format
STOP #〈data〉 16 Immediate Data ⇒ SR; STOP
LPSTOP #〈data〉 none Immediate Data ⇒ SR; interrupt mask ⇒ EBI;
STOP
Trap Generating
BKPT #〈data〉 none If breakpoint cycle acknowledged, then execute
returned operation word, else trap as illegal
instruction.
BGND none none If background mode enabled, then enter background
mode, else format/vector offset ⇒ – (SSP);
PC ⇒ – (SSP); SR ⇒ – (SSP); (vector) ⇒ PC
CHK 〈ea〉, Dn 16, 32 If Dn < 0 or Dn < (ea), then CHK exception
CHK2 〈ea〉, Rn 8, 16, 32 If Rn < lower bound or Rn > upper bound, then
CHK exception
ILLEGAL none none SSP – 2 ⇒ SSP; vector offset ⇒ (SSP);
SSP – 4 ⇒ SSP; PC ⇒ (SSP);
SSP – 2 ⇒ SSP; SR ⇒ (SSP);
llegal instruction vector address ⇒ PC
TRAP #〈data〉 none SSP – 2 ⇒ SSP; format/vector offset ⇒ (SSP);
SSP – 4 ⇒ SSP; PC ⇒ (SSP); SR ⇒ (SSP);
vector address ⇒ PC
TRAPcc none
#〈data〉
none
16, 32
If cc true, then TRAP exception
TRAPV none none If V set, then overflow TRAP exception
Condition Code Register
ANDI #〈data〉, CCR 8 Immediate Data Λ CCR ⇒ CCR
EORI #〈data〉, CCR 8 Immediate Data ⊕ CCR ⇒ CCR
MOVE 〈ea〉, CCR
CCR, 〈ea〉
16
16
Source ⇒ CCR
CCR ⇒ Destination
ORI #〈data〉, CCR 8 Immediate Data V CCR ⇒ CCR
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