Typewriter User Manual

5- 42 MC68340 USER’S MANUAL MOTOROLA
When the CPU32 completes exception processing, it is ready to begin either exception
processing for a pending exception or execution of a handler routine. Priority assignment
governs the order in which exception processing occurs, not the order in which exception
handlers are executed.
Table 5-17. Exception Priority Groups
Group/
Priority
Exception and
Relative Priority
Characteristics
0 Reset Aborts all processing (instruction or
exception); does not save old context.
1.1
1.2
Address Error
Bus Error
Suspends processing (instruction or
exception); saves internal context.
2 BKPT#n, CHK, CHK2,
Division by Zero, RTE,
TRAP#n, TRAPcc, TRAPV
Exception processing is a part of
instruction execution.
3 Illegal Instruction, Line A,
Unimplemented Line F,
Privilege Violation
Exception processing begins before
instruction execution.
4.1
4.2
4.3
Trace
Hardware Breakpoint
Interrupt
Exception processing begins when current
instruction or previous exception
processing is complete.
As a general rule, when simultaneous exceptions occur, the handler routines for lower
priority exceptions are executed before the handler routines for higher priority exceptions.
For example, consider the arrival of an interrupt during execution of a TRAP instruction,
while tracing is enabled. Trap exception processing (2) is done first, followed immediately
by exception processing for the trace (4.1), and then by exception processing for the
interrupt (4.3). Each exception places a new context on the stack. When the processor
resumes normal instruction execution, it is vectored to the interrupt handler, which returns
to the trace handler that returns to the trap handler.
There are special cases to which the general rule does not apply. The reset exception will
always be the first exception handled since reset clears all other exceptions. It is also
possible for high-priority exception processing to begin before low-priority exception
processing is complete. For example, if a bus error occurs during trace exception
processing, the bus error will be processed and handled before trace exception
processing is completed.
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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