Typewriter User Manual

5- 60 MC68340 USER’S MANUAL MOTOROLA
5.5.4 CPU32 Stack Frames
The CPU32 generates three different stack frames: four-word frames, six-word frames,
and twelve-word bus error frames.
5.5.4.1 FOUR-WORD STACK FRAME. This stack frame is created by interrupt, format
error, TRAP #n, illegal instruction, A-line and F-line emulator trap, and privilege violation
exceptions. Depending on the exception type, the PC value is either the address of the
next instruction to be executed or the address of the instruction that caused the exception
(see Figure 5-12).
15 0
SP ⇒ STATUS REGISTER
+$02 PROGRAM COUNTER HIGH
PROGRAM COUNTER LOW
+$06 0000 VECTOR OFFSET
Figure 5-12. Format $0—Four-Word Stack Frame
5.5.4.2 SIX-WORD STACK FRAME. This stack frame (see Figure 5-13) is created by
instruction-related traps, which include CHK, CHK2, TRAPcc, TRAPV, and divide-by-zero,
and by trace exceptions. The faulted instruction PC value is the address of the instruction
that caused the exception. The next PC value (the address to which RTE returns) is the
address of the next instruction to be executed.
15 0
SP ⇒ STATUS REGISTER
+$02 NEXT INSTRUCTION PROGRAM COUNTER HIGH
NEXT INSTRUCTION PROGRAM COUNTER LOW
+$06 0010 VECTOR OFFSET
+$08 FAULTED INSTRUCTION PROGRAM COUNTER HIGH
FAULTED INSTRUCTION PROGRAM COUNTER LOW
Figure 5-13. Format $2—Six-Word Stack Frame
Hardware breakpoints also utilize this format. The faulted instruction PC value is the
address of the instruction executing when the breakpoint was sensed. Usually this is the
address of the instruction that caused the breakpoint, but, because released writes can
overlap following instructions, the faulted instruction PC may point to an instruction
following the instruction that caused the breakpoint. The address to which RTE returns is
the address of the next instruction to be executed.
5.5.4.3 BUS ERROR STACK FRAME. This stack frame is created when a bus cycle fault
is detected. The CPU32 bus error stack frame differs significantly from the equivalent
stack frames of other M68000 Family members. The only internal machine state required
in the CPU32 stack frame is the bus controller state at the time of the error and a single
register.
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