Network Device User Guide

Device User Guide — 9S12C128DGV1/D V01.05

Figure 8-6 Recommended PCB Layout for 80QFP Pierce Oscillator

Section 9 Clock Reset Generator (CRG) Block Description

Consult the CRG Block User Guide for information about the Clock and Reset Generator module.

9.1 Device-specific information

The CRG is part of the IPBus domain.

C10

VDD1

VSS1

VSS2

VDD2

VSSR

VDDR

VSSPLL

VDDPLL

VDDA

VSSA

VSSX

VDDX

VSSPLL