Processor Users Manual

MOTOROLA Chapter 3. Memory Map 3-13
Part I. Overview
11B0E CMXUAR CPM mux UTOPIA address register 16 bits 15.4.1/15-7
11B10Ð11B1F Reserved Ñ 16 bytes Ñ
SI1 Registers
11B20 SI1AMR SI1 TDMA1 mode register 16 bits 14.5.2/14-17
11B22 SI1BMR SI1 TDMB1 mode register 16 bits
11B24 SI1CMR SI1 TDMC1 mode register 16 bits
11B26 SI1DMR SI1 TDMD1 mode register 16 bits
11B28 SI1GMR SI1 global mode register 8 bits 14.5.1/14-17
11B2A SI1CMDR SI1 command register 8 bits 14.5.4/14-24
11B2C SI1STR SI1 status register 8 bits 14.5.5/14-25
11B2E SI1RSR SI1 RAM shadow address register 16 bits 14.5.3/14-23
MCC1 Registers
11B30 MCCE1 MCC1 event register 16 bits 27.10.1/27-18
11B34 MCCM1 MCC1 mask register 16 bits
11B36 Reserved Ñ 16 bits Ñ
11B38 MCCF1 MCC1 conÞguration register 8 bits 27.8/27-15
11B39Ð11B3F Reserved Ñ 7 bytes Ñ
SI2 Registers
11B40 SI2AMR SI2 TDMA2 mode register 16 bits 14.5.2/14-17
11B42 SI2BMR SI2 TDMB2 mode register 16 bits
11B44 SI2CMR SI2 TDMC2 mode register 16 bits
11B46 SI2DMR SI2 TDMD2 mode register 16 bits
11B48 SI2GMR SI2 global mode register 8 bits 14.5.1/14-17
11B49 Reserved Ñ 8 bits Ñ
11B4A SI2CMDR SI2 command register 8 bits 14.5.4/14-24
11B4B Reserved Ñ 8 bits Ñ
11B4C SI2STR SI2 status register 8 bits 14.5.5/14-25
11B4D Reserved Ñ 8 bits Ñ
11B4E SI2RSR SI2 RAM shadow address register 16 bits 14.5.3/14-23
Table 3-1. Internal Memory Map (Continued)
Internal
Address
Abbreviation Name Size Section/Page Number