Processor Users Manual

MOTOROLA Contents xv
CONTENTS
Paragraph
Number
Title
Page
Number
12.5 MPC8260 Restrictions .....................................................................................12-30
12.6 Nonscan Chain Operation ................................................................................12-30
Chapter 13
Communications Processor Module Overview
13.1 Features ..............................................................................................................13-1
13.2 MPC8260
Serial Configurations ........................................................................13-3
13.3 Communications Processor (CP) .......................................................................13-4
13.3.1 Features ..........................................................................................................13-4
13.3.2 CP Block Diagram .........................................................................................13-4
13.3.3 PowerPC Core Interface.................................................................................13-6
13.3.4 Peripheral Interface ........................................................................................13-6
13.3.5 Execution from RAM.....................................................................................13-7
13.3.6 RISC Controller Configuration Register (RCCR) .........................................13-7
13.3.7 RISC Time-Stamp Control Register (RTSCR) ..............................................13-9
13.3.8 RISC Time-Stamp Register (RTSR)............................................................13-10
13.3.9 RISC Microcode Revision Number .............................................................13-10
13.4 Command Set ...................................................................................................13-11
13.4.1 CP Command Register (CPCR) ...................................................................13-11
13.4.1.1 CP Commands..........................................................................................13-13
13.4.2 Command Register Example........................................................................13-15
13.4.3 Command Execution Latency ......................................................................13-15
13.5 Dual-Port RAM................................................................................................13-15
13.5.1 Buffer Descriptors (BDs) .............................................................................13-17
13.5.2 Parameter RAM ...........................................................................................13-17
13.6 RISC Timer Tables...........................................................................................13-18
13.6.1 RISC Timer Table Parameter RAM.............................................................13-19
13.6.2 RISC Timer Command Register (TM_CMD) .............................................13-20
13.6.3 RISC Timer Table Entries............................................................................13-21
13.6.4 RISC Timer Event Register (RTER)/Mask Register (RTMR) ....................13-21
13.6.5 set timer Command ......................................................................................13-22
13.6.6 RISC Timer Initialization Sequence ............................................................13-22
13.6.7 RISC Timer Initialization Example .............................................................13-22
13.6.8 RISC Timer Interrupt Handling ...................................................................13-23
13.6.9 RISC Timer Table Scan Algorithm..............................................................13-23
13.6.10 Using the RISC Timers to Track CP Loading .............................................13-24