Processor Users Manual

4-31 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part II. ConÞguration and Reset
4.3.2.6 SIU Module ConÞguration Register (SIUMCR)
The SIU module conÞguration register (SIUMCR), shown in Figure 4-28, contains bits that
conÞgure various features in the SIU module.
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field Priority Field 8 Priority Field 9 Priority Field 10 Priority Field 11
Reset 1000 1001 1010 1011
R/W R/W
Addr 0x1003C
Bit 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field Priority Field 12 Priority Field 13 Priority Field 14 Priority Field 15
Reset 1100 1101 1110 1111
R/W R/W
Addr 0x1003E
Figure 4-27. LCL_ALRL
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field BBD ESE PBSE CDIS DPPC L2CPC LBPC APPC CS10PC BCTLC
Reset 0000_0000_0000_0000
R/W Depends on reset conÞguration sequence. See Section 5.4.1, ÒHard Reset ConÞguration Word.Ó
Addr 0x10000
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field MMR LPBSE Ñ
Reset 0000_0000_0000_0000
R/W Depends on reset conÞguration sequence. See Section 5.4.1, ÒHard Reset ConÞguration Word.Ó
Addr 0x10002
Figure 4-28. SIU Model Configuration Register (SIUMCR)