Processor Users Manual

Part III-iv MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part III. The Hardware Interface
LSB Least-signiÞcant byte
lsb Least-signiÞcant bit
LSU Load/store unit
MAC Multiply accumulate
MMU Memory management unit
MSB Most-signiÞcant byte
msb Most-signiÞcant bit
MSR Machine state register
NMSI Nonmultiplexed serial interface
OSI Open systems interconnection
PCI Peripheral component interconnect
PCMCIA Personal Computer Memory Card International Association
PRI Primary rate interface
Rx Receive
SCC Serial communications controller
SCP Serial control port
SDLC Synchronous data link control
SDMA Serial DMA
SI Serial interface
SIU System interface unit
SMC Serial management controller
SNA Systems network architecture.
SPI Serial peripheral interface
SPR Special-purpose register
SRAM Static random access memory
TDM Time-division multiplexed
TLB Translation lookaside buffer
TSA Time-slot assigner
Tx Transmit
UART Universal asynchronous receiver/transmitter
Table vi. Acronyms and Abbreviated Terms (Continued)
Term Meaning