Processor Users Manual

MOTOROLA Chapter 8. The 60x Bus 8-11
Part III. The Hardware Interface
01000 sync Address
only
Address only (if
enabled)
sync (if enabled) Not applicable
to MPC8260
Assert AACK. BG is
negated until
MPC8260 buffers are
ßushed.
01100 Kill block Address
only
Address only dcbz or dcbi (if
enabled)
Flush, cancel
reservation
AA
CK is asserted.
10000 eieio Address
only
Address only (if
enabled)
eieio (if enabled) Not applicable
to MPC8260
Assert AA
CK. BG is
negated until
MPC8260 buffers are
ßushed.
101 00 Graphics
write
Single-beat
write
Single-beat
write (non-
GLB)
ecowx Not applicable
to MPC8260
No action.
11000 TLB
invalidate
Address
only
Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
AA
CK is asserted;
MPC8260 takes no
further action.
11100 Graphics
read
Single-beat
read
Single-beat
read (non-GBL)
eciwx Not applicable
to MPC8260
MPC8260 takes no
action.
00001 lwarx
reservation
set
Address
only
Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
Address-only
operation. AA
CK is
asserted; MPC8260
takes no further action.
00101 Reserved Ñ Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
Illegal
01001 tlbsync Address
only
Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
Address-only
operation. AA
CK is
asserted; MPC8260
takes no further action.
01101 icbi Address
only
Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
Address-only
operation. AA
CK is
asserted; MPC8260
takes no further action.
1XX01 Reserved
for customer
Ñ Not applicable
to MPC8260
Not applicable to
MPC8260
Not applicable
to MPC8260
Illegal
00010 WR w/ßush Single-beat
write or
Burst
Single-beat
write
CI, WT store, or non-
processor master
under
Flush, cancel
reservation
Write, assert AA
CK
and T
A.
00110 WR w/Kill Burst Burst (non-
GLB)
Castout, ca-op push,
or snoop copyback
Kill, cancel
reservation
Write, assert AA
CK
and T
A.
01010 Read Single-beat
read or burst
Single-beat
read
CI load, CI I-fetch or
nonprocessor master
Clean or ßush Read, assert AA
CK
and T
A.
Table 8-2. Transfer Type Encoding (Continued)
TT[0Ð4]
1
60x Bus SpeciÞcation
2
MPC8260 as Bus Master
MPC8260 as
Snooper
MPC8260 as Slave
Command Transaction Bus Trans. Transaction Source Action on Hit Action on Slave Hit