Processor Users Manual

MOTOROLA Chapter 10. Memory Controller 10-43
Part III. The Hardware Interface
Figure 10-28. SDRAM Single-Beat Read, Page Closed, CL = 3
Figure 10-29. SDRAM Single-Beat Read, Page Hit, CL = 3
Figure 10-30. SDRAM Two-Beat Burst Read, Page Closed, CL = 3
CLK
ALE
CS
SDRAS
SDCAS
MA[0Ð11]
Row Column
WE
DQM
Data
D0
CLK
ALE
CS
SDRAS
SDCAS
MA[0Ð11]
Column
WE
DQM
Data
D0
Z
CLK
ALE
CS
SDRAS
SDCAS
MA[0Ð11] Row Column
WE
DQM
Data
D0
D1