Processor Users Manual

10-58 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA

Part III. The Hardware Interface

Figure 10-50 through Figure 10-53 show timing examples.

Figure 10-50. GPCM Read Followed by Read (ORx[29Ð30] = 0x, Fastest Timing)

Table 10-31. TRLX and EHTR Combinations

ORx[TRLX] ORx[EHTR] Number of Hold Time Clock Cycles

00 0

01 1

10 4

11 8

Clock

Address

PSD

VAL

CSx

CSy

R/W

Data