Processor Users Manual

10-60 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part III. The Hardware Interface
Figure 10-53. GPCM Read Followed by Read (ORx[29Ð30] = 10)
10.5.2 External Access Termination
External access termination is supported by the GPCM using GTA, which is synchronized
and sampled internally by the MPC8260. If, during a GPCM data phase (second cycle or
later), the sampled signal is asserted, it is converted to PSD
VAL, which terminates the
current GPCM access. GT
A should be asserted for one cycle. Note that because GTA is
synchronized, bus termination may occur up to two cycles after GT
A assertion, so in case
of read cycle, the device still must output data as long is OE
is asserted. The user selects
whether PSD
VAL is generated internally or externally (by means of GTA assertion) by
resetting/setting BRx[SETA].
Figure 10-54 shows how a GPCM access is terminated by GT
A assertion. Asserting GTA
terminates an access even if BRx[SETA] = 0 (internal PSDVAL generation).
Clock
Address
PSDVAL
CSx
CSy
R/W
OE
Data
Hold Time