Processor Users Manual

MOTOROLA Chapter 12. IEEE 1149.1 Test Access Port 12-21
Part III. The Hardware Interface
581 o.pin d[18] io g102.ctl
582 i.obs d[10] io Ñ
583 o.pin d[10] io g102.ctl
584 i.obs d[2] io Ñ
585 o.pin d[2] io g102.ctl
586 i.obs d[57] io Ñ
587 o.pin d[57] io g101.ctl
588 i.obs d[49] io Ñ
589 o.pin d[49] io g101.ctl
590 i.obs d[41] io Ñ
591 o.pin d[41] io g101.ctl
592 i.obs d[33] io Ñ
593 o.pin d[33] io g101.ctl
594 i.obs d[25] io Ñ
595 o.pin d[25] io g101.ctl
596 IO.ctl g101.ctl Ñ Ñ
597 i.obs d[17] io Ñ
598 o.pin d[17] io g101.ctl
599 i.obs d[9] io Ñ
600 o.pin d[9] io g101.ctl
601 i.obs d[1] io Ñ
602 o.pin d[1] io g101.ctl
603 i.obs d[56] io Ñ
604 o.pin d[56] io g100.ctl
605 i.obs d[48] io Ñ
606 o.pin d[48] io g100.ctl
607 i.obs d[40] io Ñ
608 o.pin d[40] io g100.ctl
609 i.obs d[32] io Ñ
610 o.pin d[32] io g100.ctl
611 i.obs d[24] io Ñ
612 o.pin d[24] io g100.ctl
613 IO.ctl g100.ctl Ñ Ñ
614 i.obs d[16] io Ñ
615 o.pin d[16] io g100.ctl
616 i.obs d[8] io Ñ
617 o.pin d[8] io g100.ctl
618 i.obs d[0] io Ñ
619 o.pin d[0] io g100.ctl
Table 12-2. Boundary Scan Bit Definition (Continued)
Bit Cell Type Pin/Cell Name Pin Type Output Control Cell