Processor Users Manual
xlii MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
ILLUSTRATIONS
Figure
Number
Title
Page
Number
29-18 FMC, BRC Insertion.............................................................................................. 29-32
29-19 Format of User-Defined Cells ............................................................................... 29-33
29-20 External CAM Address in UDC Extended Address Mode ................................... 29-33
29-21 ATM-to-TDM Interworking.................................................................................. 29-35
29-22 VCI Filtering Enable Bits ...................................................................................... 29-40
29-23 Global Mode Entry (GMODE).............................................................................. 29-41
29-24 Example of a 1024-Entry Receive Connection Table ........................................... 29-43
29-25 Receive Connection Table (RCT) Entry................................................................ 29-44
29-26 AAL5 Protocol-Specific RCT ............................................................................... 29-46
29-27 AAL5-ABR Protocol-Specific RCT...................................................................... 29-47
29-28 AAL1 Protocol-Specific RCT ............................................................................... 29-48
29-29 AAL0 Protocol-Specific RCT ............................................................................... 29-50
29-30 Transmit Connection Table (TCT) Entry .............................................................. 29-51
29-31 AAL5 Protocol-Specific TCT................................................................................ 29-54
29-32 AAL1 Protocol-Specific TCT................................................................................ 29-54
29-33 AAL0 Protocol-Specific TCT................................................................................ 29-55
29-34 Transmit Connection Table Extension (TCTE)ÑVBR Protocol-Specific ........... 29-56
29-35 UBR+ Protocol-Specific TCTE............................................................................. 29-57
29-36 ABR Protocol-Specific TCTE ............................................................................... 29-58
29-37 OAM Performance Monitoring Table ................................................................... 29-60
29-38 ATM Pace Control Data Structure ........................................................................ 29-62
29-39 The APC Scheduling Table Structure.................................................................... 29-63
29-40 Control Slot............................................................................................................ 29-63
29-41 Transmit Buffers and BD Table Example ............................................................. 29-65
29-42 Receive Static Buffer Allocation Example............................................................ 29-66
29-43 Receive Global Buffer Allocation Example .......................................................... 29-67
29-44 Free Buffer Pool Structure..................................................................................... 29-67
29-45 Free Buffer Pool Entry........................................................................................... 29-68
29-46 AAL5 RxBD.......................................................................................................... 29-69
29-47 AAL1 RxBD.......................................................................................................... 29-71
29-48 AAL0 RxBD.......................................................................................................... 29-72
29-49 User-Defined CellÑRxBD Extension................................................................... 29-74
29-50 AAL5 TxBD .......................................................................................................... 29-74
29-51 AAL1 TxBD .......................................................................................................... 29-76
29-52 AAL0 TxBDs......................................................................................................... 29-77
29-53 User-Defined CellÑTxBD Extension................................................................... 29-78
29-54 AAL1 Sequence Number (SN) Protection Table .................................................. 29-78
29-55 Interrupt Queue Structure ...................................................................................... 29-80
29-56 Interrupt Queue Entry ............................................................................................ 29-80
29-57 UTOPIA Master Mode Signals ............................................................................. 29-82
29-58 UTOPIA Slave Mode Signals................................................................................ 29-83
29-59 FCC ATM Mode Register (FPSMR)..................................................................... 29-86
29-60 ATM Event Register (FCCE)/FCC Mask Register (FCCM) ................................ 29-88