Processor Users Manual

13-10 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Table 13-4 describes RTSCR Þelds.
13.3.8 RISC Time-Stamp Register (RTSR)
The RISC time-stamp register (RTSR), shown in Figure 13-5, contains the time stamp.
After reset, setting RTSCR[RTE] causes the time stamp to start counting microseconds
from zero.
13.3.9 RISC Microcode Revision Number
The CP writes a revision number stored in its ROM to an dual-port RAM location called
REV_NUM that resides in the miscellaneous parameter RAM. The other locations are
reserved for future use.
Table 13-4. RTSCR Field Descriptions
Bits Name Description
0Ð4 Ñ Reserved
5 RTE Time stamp enable.
0 Disable time-stamp timer.
1 Enable time-stamp timer.
6Ð15 RTPS Time-stamp timer pre-scale. Must be programmed to generate a 1-µs period input clock to the
time-stamp timer. (Time-stamp frequency = (CPM frequency)/(RTPS+2)
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field Time Stamp
Reset Ñ
R/W R
Addr 0x119E0
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field Time Stamp
Reset Ñ
R/W R
Addr 0X119E2
Figure 13-5. RISC Time-Stamp Register (RTSR)
Table 13-5. RISC Microcode Revision Number
Address Name Width Description
RAM Base + 0x8AF0 REV_NUM Hword Microcode revision number
RAM Base + 0x8AF2 Ñ Hword Reserved