Processor Users Manual

15-12 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
Table 15-4 describes CMXSI2CR Þelds.
15.4.4 CMX FCC Clock Route Register (CMXFCR)
The CMX FCC clock route register (CMXFCR) deÞnes the connection of the FCCs to the
TSA and to the clock sources from the bank of clocks.
Bits 0 1 2 3 4 5 6 7
Field RTA2CS RTB2CS RTC2CS RTD2CS TTA2CS TTB2CS TTC2CS TTD2CS
Reset 0000_0000
R/W R/W
Addr 0x11B02
Figure 15-9. CMX SI2 Clock Route Register (CMXSI2CR)
Table 15-4. CMXSI2CR Field Descriptions
Bits Name Description
0 RTA2CS Receive TDM A2 clock source
0 TDM A2 receive clock is CLK13.
1 TDM A2 receive clock is CLK5.
1 RTB2CS Receive TDM B2 clock source
0 TDM B2 receive clock is CLK15.
1 TDM B2 receive clock is CLK17.
2 RTC2CS Receive TDM C2 clock source
0 TDM C2 receive clock is CLK3.
1 TDM C2 receive clock is CLK17.
3 RTD2CS Receive TDM D2 clock source
0 TDM D2 receive clock is CLK1.
1 TDM D2 receive clock is CLK19.
4 TTA2CS Transmit TDM A2 clock source
0 TDM A2 transmit clock is CLK14.
1 TDM A2 transmit clock is CLK6.
5 TTB2CS Transmit TDM B2 clock source
0 TDM B2 transmit clock is CLK16.
1 TDM B2 transmit clock is CLK18.
6 TTC2CS Transmit TDM C2 clock source
0 TDM C2 transmit clock is CLK4.
1 TDM C2 transmit clock is CLK18.
7 TTD2CS Transmit TDM D2 clock source
0 TDM D2 transmit clock is CLK2.
1 TDM D2 transmit clock is CLK20.