Processor Users Manual
MOTOROLA Chapter 16. Baud-Rate Generators (BRGs) 16-5
Part IV. Communications Processor Module
16.3 UART Baud Rate Examples
For synchronous communication using the internal BRG, the BRGO output clock must not
exceed the system frequency divided by 2. So, with a 66-MHz system frequency, the
maximum BRGO rate is 33 MHz. Program the UART to 16´ oversampling when using the
SCC as a UART. Rates of 8´ and 32´ are also available. Assuming 16´ oversampling is
chosen in the UART, the maximum data rate is 66 MHz Ö 16 = 4.125 Mbps. Keeping the
above in mind, use the following formula to calculate the bit rate based on a particular BRG
conÞguration for a UART:
Table 16-3 lists typical bit rates of asynchronous communication. Note that here the
internal clock rate is assumed to be 16´ the baud rate; that is, GSMRx_L[TDCR] =
GSMRx_L[RDCR] = 0b10.
Table 16-3. Typical Baud Rates for Asynchronous Communication
Baud Rate
Using 66-MHz System Clock
BRGCx[DIV16] BRGCx[CD] Actual Frequency (Hz)
75 1 3436 75.01
150 1 1718 149.98
300 1 858 300.13
600 1 429 599.56
1200 0 3436 1200.2
2400 0 1718 2399.7
4800 0 858 4802.1
9600 0 429 9593.0
19,200 0 214 19,186
38,400 0 106 38,551
57,600 0 71 57,292
115,200 0 35 114,583
460,000 0 8 458,333
Async Baud Rate
BRGCLK or External Clock Source
Prescale Divider()Clock Divider + 1()Sampling Rate()··
-------------------------------------------------------------------------------------------------------------------------------------------------=
BRGCx[EXTC]
BRGCx[DIV16]()BRGCx[CD] + 1()GSMRx_L[xDCR]()··
---------------------------------------------------------------------------------------------------------------------------------------------------------=