Processor Users Manual

29-69 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA

Part IV. Communications Processor Module

29.10.5.3 ATM Controller Buffers

Table 29-34 describes properties of the ATM receive and transmit buffers.

29.10.5.4 AAL5 RxBD

Figure 29-46 shows the AAL5 RxBD.

8 EPD Early packet discard.

0 Normal operation.

1 AAL5 frames in progress are received, but new AAL5 frames associated with

this pool are discarded. Can be used to implement EPD under core control.

9Ð15 Ñ Reserved, should be cleared.

0x0C Ñ FBP_ENTRY Free buffer pool entry. Initialize with the Þrst entry of the free buffer pool. Note

that FBP_ENTRY must be reinitialized when a busy state occurs.

Offset from FBT_BASE+RCT[BPOOL] ´ 16

Table 29-34. Receive and Transmit Buffers

AAL

Receive Transmit

Size Alignment Size Alignment

AAL5 Multiple of 48 octets (except last buffer in frame) Double word aligned Any No requirement

AAL1 At least 47 octets No requirement At least 47 octets No requirement

AAL0 52-64 octets. Burst-aligned 52Ð64 octets. No requirement

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Offset + 0x00 E Ñ WI LFCM Ñ CLP CNG ABRT CPUU LNE CRE

Offset + 0x02 Data Length (DL)

Offset + 0x04 Rx Data Buffer Pointer (RXDBPTR)

Offset + 0x06

Figure 29-46. AAL5 RxBD

Table 29-33. Free Buffer Pool Parameter Table (Continued)

Offset

Bits Name Description