Processor Users Manual

MOTOROLA Chapter 35. Parallel I/O Ports 35-9
Part IV. Communications Processor Module
PA25 FCC1: TxD[0]
UTOPIA 8
FCC1: TxD[8]
UTOPIA 16
MSNUM[0]
1
PA24 FCC1: TxD[1]
UTOPIA 8
FCC1: TxD[9]
UTOPIA 16
MSNUM[1]
1
PA23 FCC1: TxD[2]
UTOPIA 8
FCC1: TxD[10]
UTOPIA 16
PA22 FCC1: TxD[3]
UTOPIA 8
FCC1: TxD[11]
UTOPIA 16
PA21 FCC1: TxD[4]
UTOPIA 8
FCC1: TxD[12]
UTOPIA 16
FCC1: TxD[3]
MII/HDLC/transp.
nibble
PA20 FCC1: TxD[5]
UTOPIA 8
FCC1: TxD[13]
UTOPIA 16
FCC1: TxD[2]
MII/HDLC/transp
nibble
PA19 FCC1: TxD[6]
UTOPIA 8
FCC1: TxD[14]
UTOPIA 16
FCC1: TxD[1]
MII/HDLC/transp
nibble
Table 35-5. Port AÑDedicated Pin Assignment (PPARA = 1) (Continued)
Pin
Pin Function
PSORA = 0 PSORA = 1
PDIRA = 1 (Output) PDIRA = 0 (Input)
Default
Input
PDIRA = 1 (Output)
PDIRA = 0 (Input, or
Inout if SpeciÞed)
Default
Input