Processor Users Manual

35-15 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
PC26 Timer3: TOUT CLK6 GND TMCLK
real-time counter
BRGO1
PC25 FCC2: TxD[2]
UTOPIA 8
CLK7 GND BRG4: BRGO
PC24 FCC2: TxD[3]
UTOPIA 8
CLK8 GND Timer4: TOUT
PC23 BRG5: BRGO CLK9 CLK13 IDMA1: DACK
PC22 CLK10 CLK14 IDMA1: DONE
Inout
(primary option)
by PD5
PC21 BRG6: BRGO CLK11 CLK15
PC20 CLK12 CLK16 timer1/2: TGATE1 GND
PC19 BRG7: BRGO CLK13 GND
PC18 CLK14 GND timer3/4: TGATE2 GND
PC17 BRG8: BRGO CLK15/TIN4 GND
PC16 CLK16/TIN3 GND
PC15 SMC2: SMTXD SCC1: CTS
SCC1: CLSN
Ethernet
(primary option)
by PC5 FCC1: TxAddr[0]
MPHY, master
FCC1: TxAddr[0]
2
MPHY, slave
FCC2: TxAddr[4]
MPHY, slave
GND
PC14 SCC1: CD
SCC1: RENA
Ethernet
GND FCC1: RxAddr[0]
MPHY, master
FCC1: RxAddr[0]
2
MPHY, slave
FCC2: RxAddr[4]
MPHY, slave
GND
PC13 TDM_D1: L1RQ SCC2: CTS
SCC2: CLSN
Ethernet
(primary option)
by PC4 FCC1: TxAddr[1]
MPHY, master
FCC1: TxAddr[1]
2
MPHY, slave
FCC2: TxAddr[3]
MPHY, slave
GND
PC12 SI1: L1ST3 SCC2: CD
SCC2: RENA
Ethernet
GND FCC1: RxAddr[1]
MPHY, master
FCC1: RxAddr[1]
2
MPHY, slave
FCC2: RxAddr[3]
MPHY, slave
GND
PC11 TDM_D1: L1CLKO SCC3: CTS
SCC3: CLSN
1
Ethernet
(primary option)
by PC8 TDM_A2: L1TXD[3]
Nibble
FCC2: RxD[2]
1
UTOPIA 8
(secondary option)
GND
Table 35-7. Port C Dedicated Pin Assignment (PPARC = 1) (Continued)
PIN
Pin Function
PSORC = 0 PSORC = 1
PDIRC = 1 (Output) PDIRC = 0 (Input)
Default
Input
PDIRC = 1 (Output)
PDIRC = 0 (Input or
Inout if SpeciÞed)
Default
Input