Processor Users Manual

35-18 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
PD20 SCC4: RTS
SCC4: TENA
Ethernet
FCC1: RxD[2]
UTOPIA 16
GND TDM_A2: L1RSYNC
3
(secondary option)
GND
PD19
FCC1: TxAddr[4]
1
MPHY, master,
multiplexed polling
FCC2: TxAddr[3]
MPHY, master,
multiplexed polling
FCC1: TxAddr[4]
2
MPHY, slave,
multiplexed polling
FCC1: TxClav3
2
MPHY, master, direct
polling
FCC2: TxAddr[0]
MPHY, slave,
multiplexed polling
GND BRG1: BRGO SPI: SPISEL V
DD
PD18 FCC1: RxAddr[4]
1
MPHY, master,
multiplexed polling
FCC2: RxAddr[3]
MPHY, master,
multiplexed polling
FCC1: RxAddr[4]
2
MPHY, slave,
multiplexed polling
FCC1: RxClav3
2
MPHY, master, direct
polling
FCC2: RxAddr[0]
MPHY, slave,
multiplexed polling
GND SPI: SPICLK
Inout
GND
PD17
BRG2: BRGO FCC1: RxPrty
UTOPIA
GND SPI: SPIMOSI
Inout
V
DD
PD16 FCC1: TxPrty
UTOPIA
TDM_C1: L1TSYNC/
GRANT
3
(secondary option)
GND SPI: SPIMISO
Inout
SPIMO
SI
PD15
TDM_C2: L1RQ FCC1: RxD[1]
UTOPIA 16
GND I2C: I2CSDA
Inout
V
DD
PD14 TDM_C2: L1CLKO FCC1: RxD[0]
UTOPIA 16
GND I2C: I2CSCL
Inout
GND
PD13 SI1: L1ST1
TDM_B1: L1TXD
Inout
GND
PD12 SI1: L1ST2
TDM_B1: L1RXD
Inout
GND
PD11
TDMB2: L1RQ FCC2: RxD[0]
3
UTOPIA 8
(secondary option)
GND TDM_B1: L1TSYNC/
GRANT
GND
PD10
TDMB2: L1CLKO FCC2: RxD[1]
3
UTOPIA 8
(secondary option)
GND BRG4: BRGO TDM_B1: L1RSYNC GND
PD9
SMC1: SMTXD BRG3: BRGO FCC2: RxPrty
UTOPIA
GND
Table 35-8. Port D Dedicated Pin Assignment (PPARD = 1) (Continued)
Pin
Pin Function
PSORD = 0 PSORD = 1
PDIRD = 1 (Output) PDIRD = 0 (Input)
Default
Input
PDIRD = 1 (Output)
PDIRD = 0 (Input, or
Inout if SpeciÞed)
Default
Input