User`s guide

64 MPC8240 and MPC8260 Emulation
Chapter 5: Connecting and Configuring the Emulator
Designing a MPC8240 or MPC8260 Target System
Reset Signals for the MPC8240
The SRESET, HRESET signals from the JTAG connector may be
logically ORed with their respective signals on the target system. The
MPC8240 has two hard resets, HRST_CPU and HRST_CTRL. HRESET
from the debug connector must be routed to the HRST_CPU reset logic
and optionally routed to the HRST_CTRL reset logic depending on
system requirements.
The emulation probe/module drives SRESET
and HRESET with open-
drain drivers using 2.7 Kohm pullups to VDD. The target system
designer may take advantage of these open-drain drivers by wire-
ORing SRESET and/or HRESET to open-drain drivers on the target
system. It is not necessary to use a wire-OR configuration, but reset
status messages can only be generated by the probe/module when
using the wire-ORed configuration.
The TRST
signal from the JTAG connector must be logically ORed with
TRST on the target system. TRST is actively driven by the probe/
module and cannot be wire-ORed.
Reset Signals for the MPC8260
SRESET and HRESET from the debug connector must be ORed with
the respective SRESET and HRESET signals on the target system.
They they can be logically ORed or wire-ORed on the target system.
The emulation probe/module drives SRESET
and HRESET with open-
drain drivers using 2.7 Kohm pullups to VDD.
It is not necessary to use a wire-OR configuration, but reset status
messages can only be generated by the probe/module when using the
wire-ORed configuration.
The TRST
signal from the JTAG connector must be logically ORed with
TRST on the target system. TRST is actively driven by the probe/
module and cannot be wire-ORed.