User`s guide

MPC8240 and MPC8260 Emulation 79
Chapter 5: Connecting and Configuring the Emulator
Configuring the Emulator
Before resetting the target or issuing the probe reset command (rst),
the cf_immr register must be set to the reset value as defined by the
reset configuration word. If after reset user code changes the IMMR
value, then the cf_immr copy must also be updated.
The default value for cf_immr is 0x0f000000 when the emulation probe
is powered on or when the 'init -c' command is issued.
cf_sypcr
The cf_sypcr register is used to disable the watchdog timer after a
probe reset command (rst) is issued. Since the SYPCR is a write once
register, direct writes to the SYPCR register have no effect while using
the probe.
If a value other than the default is desired, then the cf_sypcr register
must be set (reg cf_sypcr=xxxxxxxx) and the SYPCR will be updated
on the next probe reset command (rst). The probe can only disable
the watchdog timer if the 'rst' command is used. Pressing the target
reset button will not disable the timer. The default value is 0xffffffc3.
Cache support
This version of the firmware does not support the cpu running with
cache on. Targets must not enable cache.
Break
If the following error occurs, the processor is in an unstable state and
should be reset via a hard reset or a power-on reset. The 'rst' command
may not be able to bring the processor into a known state.
!ERROR 145! Unable to soft stop - freezing the processor
clocks