User`s manual

(de)serialize_memory_access
SBCSCSI/D1 C-5
C
(de)serialize_memory_access
NAME
serialize_memory_access Ñ Enforce serialized access to I/O memory
deserialize_memory_access Ñ Allow out-of-order access to I/O memory
SYNOPSIS
void serialize_memory_access()
void deserialize_memory_access()
DESCRIPTION
Many processors execute and complete load and store instructions in the order
in which they are encountered. For instance, if a program has a store
instruction followed by a load instruction, the processor will execute the store
instruction, and then the load instruction. Some processors, for efficiency
reasons, overlap instruction executions and do not necessarily finish
instructions in the same order as they begin them. Consider a possible
execution of the previous example on such a processor: the store will be issued,
then the load will be issued, but the load instruction may complete before the
store instruction does.
Normally, this is not a problem because the processor will produce results in
memory that are the same as if all loads and stores were executed in program
order. Note, however, that this is because the memory system functions
correctly regardless of the order of loads and stores. That is, a store to address
A wonÕt change the results of a load from address B, for distinct addresses A
and B. However, some hardware devices and their drivers require that the
loads and stores be visible to the device in a specific order. In such a case, a
processor must perform the instructions in a serialized fashion to guarantee
correct behavior.
When compiling to run on the MVME197 (refer to the file incl/sfw_cnfg.h),
the user-supplied routines set/clear the
SRM (serialize memory) bit in the 88110
PSR (processor status register). If one compiled object may be executed on both
an 88100 and an 88110, then those routines should verify that the processor is
an 88110.
The SCSI Firmware will call serialize_memory_access expecting that upon
return, all accesses to I/O registers (i.e., the 53C710, VMEchip2, and the
PCCchip2) will complete in order. It will match every call to enable
serialization with a subsequent call to deserialize_memory_access before
returning control to the Application.