Computer Hardware User Manual
Table Of Contents
- Contents
- List of Figures
- List of Tables
- About This Manual
- Programming Issues
- Introduction
- Programming Interfaces
- Functional Description
- Memory Maps
- Interrupt Handling
- Cache Coherency (MVME167P)
- Cache Coherency (MVME177P)
- Using Bus Timers
- Indivisible Cycles
- Supervisor Stack Pointer (MC68060)
- Sources of Local Bus Errors
- Error Conditions
- MPU Parity Error
- MPU Offboard Error
- MPU TEA - Cause Unidentified
- MPU Local Bus Time-out
- DMAC VMEbus Error
- DMAC Parity Error
- DMAC Offboard Error
- DMAC LTO Error
- DMAC TEA - Cause Unidentified
- SCC Retry Error
- SCC Parity Error
- SCC Offboard Error
- SCC LTO Error
- LAN Parity Error
- LAN Offboard Error
- LAN LTO Error
- SCSI Parity Error
- SCSI Offboard Error
- SCSI LTO Error
- VMEchip2
- Introduction
- Functional Blocks
- LCSR Programming Model
- Programming the VMEbus Slave Map Decoders
- VMEbus Slave Ending Address Register 1
- VMEbus Slave Starting Address Register 1
- VMEbus Slave Ending Address Register 2
- VMEbus Slave Starting Address Register 2
- VMEbus Slave Address Translation Address Offset Register 1
- VMEbus Slave Address Translation Select Register 1
- VMEbus Slave Address Translation Address Offset Register 2
- VMEbus Slave Address Translation Select Register 2
- VMEbus Slave Write Post and Snoop Control Register 2
- VMEbus Slave Address Modifier Select Register 2
- VMEbus Slave Write Post and Snoop Control Register 1
- VMEbus Slave Address Modifier Select Register 1
- Programming the Local-Bus-to-VMEbus Map Decoders
- Local Bus Slave (VMEbus Master) Ending Address Register 1
- Local Bus Slave (VMEbus Master) Starting Address Register 1
- Local Bus Slave (VMEbus Master) Ending Address Register 2
- Local Bus Slave (VMEbus Master) Starting Address Register 2
- Local Bus Slave (VMEbus Master) Ending Address Register 3
- Local Bus Slave (VMEbus Master) Starting Address Register 3
- Local Bus Slave (VMEbus Master) Ending Address Register 4
- Local Bus Slave (VMEbus Master) Starting Address Register 4
- Local Bus Slave (VMEbus Master) Address Translation Address Register 4
- Local Bus Slave (VMEbus Master) Address Translation Select Register 4
- Local Bus Slave (VMEbus Master) Attribute Register 4
- Local Bus Slave (VMEbus Master) Attribute Register 3
- Local Bus Slave (VMEbus Master) Attribute Register 2
- Local Bus Slave (VMEbus Master) Attribute Register 1
- VMEbus Slave GCSR Group Address Register
- VMEbus Slave GCSR Board Address Register
- Local-Bus-to-VMEbus Enable Control Register
- Local-Bus-to-VMEbus I/O Control Register
- ROM Control Register
- Programming the VMEchip2 DMA Controller
- DMAC Registers
- EPROM Decoder, SRAM and DMA Control Register
- Local-Bus-to-VMEbus Requester Control Register
- DMAC Control Register 1 (bits 07)
- DMAC Control Register 2 (bits 815)
- DMAC Control Register 2 (bits 07)
- DMAC Local Bus Address Counter
- DMAC VMEbus Address Counter
- DMAC Byte Counter
- Table Address Counter
- VMEbus Interrupter Control Register
- VMEbus Interrupter Vector Register
- MPU Status and DMA Interrupt Count Register
- DMAC Status Register
- Programming the Tick and Watchdog Timers
- VMEbus Arbiter Time-Out Control Register
- DMAC Ton/Toff Timers and VMEbus Global Time-out Control Register
- VME Access, Local Bus, and Watchdog Time-out Control Register
- Prescaler Control Register
- Tick Timer 1 Compare Register
- Tick Timer 1 Counter
- Tick Timer 2 Compare Register
- Tick Timer 2 Counter
- Board Control Register
- Watchdog Timer Control Register
- Tick Timer 2 Control Register
- Tick Timer 1 Control Register
- Prescaler Counter
- Programming the Local Bus Interrupter
- Local Bus Interrupter Status Register (bits 2431)
- Local Bus Interrupter Status Register (bits 1623)
- Local Bus Interrupter Status Register (bits 815)
- Local Bus Interrupter Status Register (bits 07)
- Local Bus Interrupter Enable Register (bits 2431)
- Local Bus Interrupter Enable Register (bits 1623)
- Local Bus Interrupter Enable Register (bits 815)
- Local Bus Interrupter Enable Register (bits 07)
- Software Interrupt Set Register (bits 815)
- Interrupt Clear Register (bits 2431)
- Interrupt Clear Register (bits 1623)
- Interrupt Clear Register (bits 815)
- Interrupt Level Register 1 (bits 2431)
- Interrupt Level Register 1 (bits 1623)
- Interrupt Level Register 1 (bits 815)
- Interrupt Level Register 1 (bits 07)
- Interrupt Level Register 2 (bits 2431)
- Interrupt Level Register 2 (bits 1623)
- Interrupt Level Register 2 (bits 815)
- Interrupt Level Register 2 (bits 07)
- Interrupt Level Register 3 (bits 2431)
- Interrupt Level Register 3 (bits 1623)
- Interrupt Level Register 3 (bits 815)
- Interrupt Level Register 3 (bits 07)
- Interrupt Level Register 4 (bits 2431)
- Interrupt Level Register 4 (bits 1623)
- Interrupt Level Register 4 (bits 815)
- Interrupt Level Register 4 (bits 07)
- Vector Base Register
- I/O Control Register 1
- I/O Control Register 2
- I/O Control Register 3
- Miscellaneous Control Register
- Programming the VMEbus Slave Map Decoders
- GCSR Programming Model
- PCCchip2
- Introduction
- Functional Description
- Overall Memory Map
- Programming Model
- Chip ID Register
- Chip Revision Register
- General Control Register
- Vector Base Register
- Programming the Tick Timers
- Tick Timer 1 Compare Register
- Tick Timer 1 Counter
- Tick Timer 2 Compare Register
- Tick Timer 2 Counter
- Prescaler Count Register
- Prescaler Clock Adjust Register
- Tick Timer 2 Control Register
- Tick Timer 1 Control Register
- General Purpose Input Interrupt Control Register
- General Purpose Input/Output Pin Control Register
- Tick Timer 2 Interrupt Control Register
- Tick Timer 1 Interrupt Control Register
- SCC Error Status and Interrupt Control Registers
- LANC Error Status and Interrupt Control Registers
- Programming the SCSI Error Status and Interrupt Registers
- Programming the Printer Port
- Printer ACK Interrupt Control Register
- Printer FAULT Interrupt Control Register
- Printer SEL Interrupt Control Register
- Printer PE Interrupt Control Register
- Printer BUSY Interrupt Control Register
- Printer Input Status Register
- Printer Port Control Register
- Chip Speed Register
- Printer Data Register
- Interrupt Priority Level Register
- Interrupt Mask Level Register
- MCECC Functions
- Introduction
- Features
- Functional Description
- General Description
- Performance
- Cache Coherency
- ECC
- Cycle Types
- Error Reporting
- Single Bit Error (Cycle Type = Burst Read or Non-Burst Read)
- Double Bit Error (Cycle Type = Burst Read or Non-Burst Read)
- Triple (or Greater) Bit Error (Cycle Type = Burst Read or Non-Burst Read)
- Cycle Type = Burst Write
- Single Bit Error (Cycle Type = Non-Burst Write)
- Double Bit Error (Cycle Type = Non-Burst Write)
- Triple (or Greater) Bit Error (Cycle Type = Non-Burst Write)
- Single Bit Error (Cycle Type = Scrub)
- Double Bit Error (Cycle Type = Scrub)
- Triple (or Greater) Bit Error (Cycle Type = Scrub)
- Error Logging
- Scrub
- Refresh
- Arbitration
- Chip Defaults
- Programming Model
- Chip ID Register
- Chip Revision Register
- Memory Configuration Register
- Base Address Register
- DRAM Control Register
- BCLK Frequency Register
- Data Control Register
- Scrub Control Register
- Scrub Period Register Bits 15-8
- Scrub Period Register Bits 7-0
- Chip Prescaler Counter
- Scrub Time On/Time Off Register
- Scrub Prescaler Counter (Bits 21-16)
- Scrub Prescaler Counter (Bits 15-8)
- Scrub Prescaler Counter (Bits 7-0)
- Scrub Timer Counter (Bits 15-8)
- Scrub Timer Counter (Bits 7-0)
- Scrub Address Counter (Bits 26-24)
- Scrub Address Counter (Bits 23-16)
- Scrub Address Counter (Bits 15-8)
- Scrub Address Counter (Bits 7-4)
- Error Logger Register
- Error Address (Bits 31-24)
- Error Address (Bits 23-16)
- Error Address (Bits 15-8)
- Error Address (Bits 7-4)
- Error Syndrome Register
- Defaults Register 1
- Defaults Register 2
- SDRAM Configuration Register
- Initialization
- Syndrome Decoding
- Summary of Changes
- Printer and Serial Port Connections
- Related Documentation
- Index
LCSR Programming Model
http://www.motorola.com/computer/literature 2-25
2
This sheet begins on facing page.
0123456789101112131415
VME
ACCESS
TIMER
LOCAL
BUS
TIMER
WD
TIME OUT
SELECT
PRESCALER
CLOCK ADJUST
TIC
EN
1
COC
EN
1
CLR
OVF
1
TIC
EN
2
COC
EN
2
CLR
OVF
2
OVERFLOW
COUNTER 1
OVERFLOW
COUNTER 2
SCALER
1361 9403
COMPARE REGISTER
COUNTER
COMPARE REGISTER
COUNTER
EN
IRQ
15
EN
IRQ
14
EN
IRQ
13
EN
IRQ
12
EN
IRQ
11
EN
IRQ
10
EN
IRQ
9
EN
IRQ
8
EN
IRQ
7
EN
IRQ
6
EN
IRQ
5
EN
IRQ
4
EN
IRQ
3
EN
IRQ
2
EN
IRQ
1
EN
IRQ
0
CLR
IRQ
15
CLR
IRQ
14
CLR
IRQ
13
CLR
IRQ
12
CLR
IRQ
11
CLR
IRQ
10
CLR
IRQ
9
CLR
IRQ
8
SET
IRQ
15
SET
IRQ
14
SET
IRQ
13
SET
IRQ
12
SET
IRQ
11
SET
IRQ
10
SET
IRQ
9
SET
IRQ
8
SW7
IRQ
SW6
IRQ
SW5
IRQ
SW4
IRQ
SW3
IRQ
SW2
IRQ
SW1
IRQ
SW0
IRQ
SPARE VME
IRQ7
VME
IRQ6
VME
IRQ5
VME
IRQ4
VME
IRQ3
VME
IRQ2
VME
IRQ1
0123456789101112131415
GPIOO
P ERROR
IRQ LEVEL
IRQ1E
IRQ LEVEL
TIC TIMER 2
IRQ LEVEL
TIC TIMER 1
IRQ LEVEL
SW3
IRQ LEVEL
SW2
IRQ LEVEL
SW1
IRQ LEVEL
SW0
IRQ LEVEL
VME IRQ 4
IRQ LEVEL
VMEB IRQ 3
IRQ LEVEL
VME IRQ 2
IRQ LEVEL
VME IRQ 1
IRQ LEVEL
SIG 1
IRQ LEVEL
SIG 0
IRQ LEVEL
LM 1
IRQ LEVEL
LM 0
IRQ LEVEL
GPIOI GPI
MP
IRQ
EN
REV
EROM
NO
EL
BBSY
DIS
SRAM
DIS
MST
DIS
BSYT
EN
INT
DIS
BGN