Computer Hardware User Manual

Memory Maps
http://www.motorola.com/computer/literature 1-39
1
B Receive Buffer Byte Count BRBCNT 48 W R/W
A Receive Buffer Status ARBSTS 4F B R/W
B Receive Buffer Status BRBSTS 4E B R/W
Receive Current Buffer Address Lower
RCBADRL
3E W R
Receive Current Buffer Address Upper
RCBADRU
3C W R
DMA Transmit Registers
A Transmit Buffer Address Lower
ATBADRL
52 W R/W
A Transmit Buffer Address Upper
ATBADRU
50 W R/W
B Transmit Buffer Address Lower
BTBADRL
56 W R/W
B Transmit Buffer Address Upper
BTBADRU
54 W R/W
A Transmit Buffer Byte Count ATBCNT 5A W R/W
B Transmit Buffer Byte Count BTBCNT 58 W R/W
A Transmit Buffer Status ATBSTS 5F B R/W
B Transmit Buffer Status BTBSTS 5E B R/W
Transmit Current Buffer Address Lower
TCBADRL
3A W R
Transmit Current Buffer Address Upper TCBADRU 38 W R
Timer Registers
Timer Period Register TPR DA B R/W
Receive Time-out Period Register RTPR 24 W R/W
Async
Receive Time-out Period Regis low RTPRl 25 B R/W
Async
Receive Time-out Period Register high RTPRh 24 B R/W
Async
General Timer 1 GT1 2A W R Sync
Table 1-9. Cirrus Logic CD2401 Serial Port Memory Map (Continued)
Base Address = $FFF45000
Register Description Register
Name
Offsets Size Access