MVME177P Single-Board Computer Installation and Use V177PA/IH1 Edition of October 2000
© Copyright 2000 Motorola, Inc. All rights reserved. Printed in the United States of America. Motorola® and the Motorola logo are registered trademarks of Motorola, Inc. MC68040™ and MC68060™ are trademarks of Motorola, Inc. All other products mentioned in this document are trademarks or registered trademarks of their respective holders.
Safety Summary The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. The safety precautions listed below represent warnings of certain dangers of which Motorola is aware.
Flammability All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating of 94V-0 by UL-recognized manufacturers. EMI Caution ! Caution This equipment generates, uses and can radiate electromagnetic energy. It may cause or be susceptible to electromagnetic interference (EMI) if not installed and used with adequate EMI protection. Lithium Battery Caution This product contains a lithium battery to power the clock and calendar circuitry.
CE Notice (European Community) Motorola Computer Group products with the CE marking comply with the EMC Directive (89/336/EEC). Compliance with this directive implies conformity to the following European Norms: EN55022 “Limits and Methods of Measurement of Radio Interference Characteristics of Information Technology Equipment”; this product tested to Equipment Class B EN50082-1:1997 “Electromagnetic Compatibility—Generic Immunity Standard, Part 1.
Limited and Restricted Rights Legend If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply unless otherwise agreed to in writing by Motorola, Inc. Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (b)(3) of the Rights in Technical Data clause at DFARS 252.227-7013 (Nov. 1995) and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252.
Contents Overview of Contents ................................................................................................xvi Comments and Suggestions ......................................................................................xvii Conventions Used in This Manual............................................................................xvii CHAPTER 1 Hardware Preparation and Installation Introduction............................................................................................
Restarting the System .............................................................................................. 2-11 Reset ................................................................................................................. 2-11 Abort................................................................................................................. 2-12 Break ................................................................................................................
SCSI Interface............................................................................................4-12 SCSI Termination ......................................................................................4-12 Local Resources................................................................................................4-12 Programmable Tick Timers .......................................................................4-13 Watchdog Timer .............................................................
x
List of Figures Figure 1-1. MVME177P Board Layout .....................................................................1-6 Figure 2-1. MVME177P/Firmware System Startup ..................................................2-3 Figure 4-1. MVME177P Block Diagram...................................................................
xii
List of Tables Table 1-1. Startup Overview ......................................................................................1-1 Table 1-2. MVME177P Configuration Settings ........................................................1-5 Table 1-3. Petra SDRAM Size Settings .....................................................................1-9 Table 2-1. MVME177P Front Panel Controls ...........................................................2-1 Table 2-2. General-Purpose Configuration Bits (J1) ...........
xiv
About This Manual This manual provides general information, preparation for use and installation instructions, operating instructions, and functional description for the MVME177P series of Single Board Computers (referred to as the MVME177P throughout this manual).
Overview of Contents Chapter 1, Hardware Preparation and Installation, provides unpacking instructions, hardware preparation guidelines, and installation instructions for the MVME177P single-board computer. Chapter 2, Startup and Operation, provides information on powering up the MVME177P single-board computer after its installation in a system and describes the functionality of the switches, status indicators, and I/O ports.
Comments and Suggestions Motorola welcomes and appreciates your comments on its documentation. We want to know what you think about our manuals and how we can make them better. Mail comments to: Motorola Computer Group Reader Comments DW164 2900 S. Diablo Way Tempe, Arizona 85282 You can also submit comments to the following e-mail address: reader-comments@mcg.mot.com In all your correspondence, please list your name, position, and company.
bold is used for user input that you type just as it appears; it is also used for commands, options and arguments to commands, and names of programs, directories and files. italic is used for names of variables to which you assign values. Italic is also used for comments in screen displays and examples, and to introduce new terms. courier is used for system output (for example, screen displays, reports), examples, and system prompts.
1Hardware Preparation and Installation 1 Introduction This chapter provides unpacking instructions, hardware preparation guidelines, and installation instructions for the MVME177P Single Board Computer. Getting Started This section supplies an overview of startup procedures applicable to teh MVME177P. Equipment requirements, directions for unpacking, and ESD precautions that you should take to complete the section.
1 Hardware Preparation and Installation Table 1-1. Startup Overview What you need to do... Connect any other equipment you will be using. Power up the system. Refer to... Installation Instructions on page 1-11 Applying Power on page 2-3 Solving Startup Problems on page B-1 Bringing up the Board on page 2-5 Note that the firmware initializes and tests the board. You may also wish to obtain the 177Bug Firmware User’s Manual, listed in Appendix E, Related Documentation. Initialize the system clock.
Getting Started Guidelines for Unpacking Note If the shipping carton is damaged upon receipt, request that the carrier’s agent be present during the unpacking and inspection of the equipment. Unpack the equipment from the shipping carton. Refer to the packing list and verify that all items are present. Save the packing material for storing and reshipping of equipment. ! Avoid touching areas of integrated circuitry; static discharge can damage circuits.
1 Hardware Preparation and Installation ! Warning Turn the system’s power off before you perform these procedures. Failure to turn the power off before opening the enclosure can result in personal injury or damage to the equipment. Hazardous voltage, current, an denergy levels are present in the chassis. Hazardous voltages may be present on power switch terminals even when the power switch is off. Never operate the system with the cover removed. Always replace the cover before powering up the system.
Preparing the Board MVME177P Configuration Figure 1-1 illustrates the placement of the jumper headers, connectors, configuration switches, and various other components on the MVME177P. Manually configurable jumper headers and configuration switches on the MVME177P are listed in the following table. Table 1-2.
1 Hardware Preparation and Installation 1 15 MVME 177P-56SE 2 16 9 A1 B1 C1 J1 10 J2 1 2 DS4 2 2 1 3 J7 J6 DS6 1 DS5 XU2 VME J9 DS3 SCSI 5 +12V 6 LAN 1 SCON XU1 RUN DS2 STAT DS1 FAIL P1 DS8 20 DS7 BT1 19 J3 O N N 1 2 S3 S4 O A32 B32 C32 1234 1 2 S1 L1 ABORT RESET S2 60 59 L2 J4 A1 B1 C1 2 60 1 59 P2 J5 2 1 1 1 3 3 A32 B32 C32 J11 J10 2817 0800 Figure 1-1.
Preparing the Board VME System Controller (J6) The MVME177P can be VMEbus system controller. The system controller function is enabled/disabled by jumpers on header J6. When the MVME177P is system controller, the SCON LED is turned on. The VMEchip2 may be configured as a system controller as follows.
1 Hardware Preparation and Installation ! Removing all jumpers may temporarily disable the SRAM. Do not remove all jumpers from J9, except for storage. Caution Serial Port 4 Clock Configuration (J10 and J11) Serial port 4 can be configured to use clock signals provided by the RTXC4 and TRXC4 signal lines. Headers J10 and J11 on the MVME177P configure serial port 4 to drive or receive TRXC4 and RTXC4, respectively. The factory configuration has port 4 set to receive both signals.
Preparing the Board Petra SDRAM Size (S3) MVME177P boards use SDRAM (Synchronous DRAM) in place of DRAM. For compatibility with user applications, the MVME177P’s SDRAM is configurable to emulate 4MB, 8MB, 16MB, 32MB, 64MB, or 128MB ECC-protected DRAM. Board configuration is a function of switch settings and resistor population options. S3 is a four-segment slide switch whose lower three segments establish the size of the ECC DRAM memory model (segment 4 is not used.
1 Hardware Preparation and Installation Note As shown in the preceding table, the MVME177P Petra/MCECC interface supports on-board ECC DRAM emulations up to 128MB. For sizes beyond 128MB, the MVME177P accommodates memory mezzanines of the types used on previous MVME177 boards. One additional mezzanine can be plugged in to provide up to 128MB of additional DRAM. Board EPROM/Flash Mode (S4) The MVME167P and MVME177P single-board computers share a common board artwork.
Preparing the Transition Module Preparing the Transition Module The MVME177P supports the MVME712B transition module, which (in conjunction with an LCP2 adapter board) supplies SCSI and Ethernet connections. It also supports the MVME712M transition module, which (in conjunction with a P2 adapter board) supplies serial and parallel I/O in addition to SCSI and Ethernet connections.
1 Hardware Preparation and Installation ! Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting. Warning 2. Remove the chassis cover as instructed in the user’s manual for the equipment. 3. Remove the filler panel from the card slot where you are going to install the MVME177P. – If you intend to use the MVME177P as system controller, it must occupy the leftmost card slot (slot 1).
Installation Instructions 8. Connect the P2 adapter board or LCP2 adapter board and cable(s) to MVME177P backplane connector P2. This provides a connection point for terminals or other peripherals at the EIA-232-D serial ports, parallel port, SCSI port, or LAN Ethernet port. For information on installing the P2 or LCP2 Adapter Board and the MVME712 series transition module(s), refer to the corresponding user’s manuals (the Programmer’s Reference Guide provides some connection diagrams). 9.
1 Hardware Preparation and Installation Whether the MVME177P operates as a VMEbus master or VMEbus slave, it is configured for 32 bits of address and 32 bits of data (A32/D32). However, it handles A16 or A24 devices in the address ranges indicated in the VMEchip2 chapter of the Programmer’s Reference Guide. D8 and/or D16 devices in the system must be handled by the MC68060 software. For specifics, refer to the memory maps in the Programmer’s Reference Guide.
Installation Instructions If a solid-state fuse opens, you will need to remove power for several minutes to let the fuse reset to a closed or shorted condition. http://www.motorola.
1 Hardware Preparation and Installation 1-16 Computer Group Literature Center Web Site
2Startup and Operation 2 Introduction This chapter supplies information on powering up the MVME177P SingleBoard Computer after its installation in a system, and describes the functionality of the switches, status indicators, and I/O ports. For programming information, consult the MVME1X7P Single Board Computers Programmer’s Reference Guide, listed under “Related Documentation” in Appendix E.
Startup and Operation Table 2-1. MVME177P Front Panel Controls 2 Control/Indicator Function SCON LED (DS4, green) System controller. Lights when the VMEchip2 ASIC is functioning as VMEbus system controller. LAN LED (DS5, green) LAN activity. Lights when the LAN controller is functioning as local bus master. +12V LED (DS6, green) Fuse OK. Indicates that +12Vdc power is available to the LAN interface. SCSI LED (DS7, green) SCSI activity.
Applying Power Applying Power 2 When you power up (or when you reset) the system, the firmware executes some self-checks and proceeds to the hardware initialization. The system startup flows in a predetermined sequence, following the hierarchy inherent in the processor and the MVME177P hardware. The figure below charts the flow of the basic initialization sequence that takes place during system startup.
Startup and Operation 2 Pre-Startup Checklist Before you power up the MVME177P system, be sure that the following conditions exist: 1. Jumpers and/or configuration switches on the MVME177P SingleBoard Computer and associated equipment are set as required for your particular application. 2. The MVME177P board is installed and cabled up as appropriate for your particular chassis or system, as outlined in Chapter 1. 3.
Bringing up the Board Bringing up the Board 2 The MVME177P comes with MVME177Bug firmware installed. For the firmware to operate properly with the board, you must follow the steps below. ! Inserting or removing boards with power applied may damage board components. Caution Turn all equipment power OFF. Refer to MVME177P Configuration on page 1-5 and verify that jumpers and switches are configured as necessary for your particular application. 1.
Startup and Operation 4. Headers J10 and J11 configure serial port 4 to drive or receive clock signals provided by the RTXC and TRXC signal lines. The MVME177P factory configuration has port 4 set to receive both signals. Refer to the instructions in Chapter 1 if your application requires reconfiguring port 4. 2 Table 2-2. General-Purpose Configuration Bits (J1) Bit No.
Bringing up the Board – Eight bits per character 2 – One stop bit per character – Parity disabled (no parity) – Baud rate 9600 baud (the power-up default) After power-up, you can reconfigure the baud rate of the debug port by using the 177Bug Port Format (PF) command. Note Whatever the baud rate, some form of hardware handshaking — either XON/XOFF or via the RTS/CST line — is desirable if the system supports it.
Startup and Operation The board’s self-tests and operating systems require that the realtime clock be running. 2 Autoboot Autoboot is a software routine included in the 177Bug EPROM to provide an independent mechanism for booting operating systems. The autoboot routine automatically scans for controllers and devices in a specified sequence until a valid bootable device containing a boot media is found or the list is exhausted. If a valid bootable device is found, a boot from that device is started.
Bringing up the Board However, if the MVME177P loses power but the controller does not, and the tape happens to be at load point, the necessary command sequences (Attach and Rewind) cannot be given to the controller and the autoboot will not succeed. ROMboot As shipped from the factory, 177Bug occupies the first quarter of the EPROM in sockets XU1 and XU2. This leaves the remainder of XU1 and XU2 storage and Flash memory (depending on the setting of S4) available for your use.
Startup and Operation ❏ 2 Your routine passes a checksum test, which ensures that this routine was really intended to receive control at powerup. For complete details on using the ROMboot function, refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual. Network Boot Network Auto Boot is a software routine in the 177Bug EPROM which provides a mechanism for booting an operating system using a network (local Ethernet interface) as the boot device.
Restarting the System Restarting the System 2 You can initialize the system to a known state in three different ways: Reset, Abort, and Break. Each method has characteristics which make it more suitable than the others in certain situations. A special debugger function is accessible during resets. This feature instructs the debugger to use the default setup/operation parameters in ROM instead of your own setup/operation parameters in NVRAM.
Startup and Operation You will need to reset your system if the processor ever halts, or if the 177Bug environment is ever lost (vector table is destroyed, stack corrupted, etc.). 2 Abort Aborts are invoked by pressing and releasing the ABORT switch on the MVME177P front panel. When you invoke an abort while executing a user program (running target code), a snapshot of the processor state is stored in the target registers.
Diagnostic Facilities Diagnostic Facilities 2 The 177Bug package includes a set of hardware diagnostics for testing and troubleshooting the MVME177P. To use the diagnostics, switch directories to the diagnostic directory. If you are in the debugger directory, you can switch to the diagnostic directory with the debugger command Switch Directories (SD). The diagnostic prompt 177-Diag> appears.
Startup and Operation 2 2-14 Computer Group Literature Center Web Site
3177Bug Firmware 3 Introduction The 177Bug firmware is the layer of software just above the hardware. The firmware supplies the appropriate initialization for devices on the MVME177P board upon power-up or reset. This chapter describes the basics of 177Bug and its architecture, describes the monitor (interactive command portion of the firmware) in detail, and gives information on using the debugger and special commands. A list of 177Bug commands appears at the end of the chapter.
177Bug Firmware 177Bug includes: 3 ❏ Commands for display and modification of memory ❏ Breakpoint and tracing capabilities ❏ A powerful assembler/disassembler useful for patching programs ❏ A “self-test at power-up” feature which verifies the integrity of the system In addition, the TRAP #15 system calls make various 177Bug routines that handle I/O, data conversion, and string functions available to user programs.
177Bug Implementation If you have used one or more of Motorola’s other debugging packages, you will find the CISC 177Bug very similar. Some effort has also been made to improve the consistency of interactive commands. For example, delimiters between commands and arguments may be commas or spaces interchangeably. 177Bug Implementation Physically, 177Bug is contained in two 27D4002 44-pin EPROMs installed in sockets XU1 and XU2.
177Bug Firmware 177Bug requires a minimum of 64KB of contiguous read/write memory to operate. The ENV command controls where this block of memory is located. Regardless of where the onboard RAM is located, the first 64KB is used for 177Bug stack and static variable space and the rest is reserved as user space.
Debugger Commands A debugger command is made up of the following parts: ❏ The command name, either uppercase or lowercase (e.g., MD or md). ❏ A port number (if the command is set up to work with more than one port). ❏ Any required arguments, as specified by the command. ❏ At least one space before the first argument. Precede all other arguments with either a space or comma. ❏ One or more options. Precede an option or a string of options with a semicolon (;).
177Bug Firmware Table 3-2.
Debugger Commands Table 3-2.
177Bug Firmware Table 3-2. Debugger Commands (Continued) Command VE VER WL 3 Description Verify S-Records Against Memory Display Revision/Version Write Loop Modifying the Environment You can use the factory-installed debug monitor, 177Bug, to modify certain parameters contained in the MVME177P’s Non-Volatile RAM (NVRAM), also known as Battery Backed-Up RAM (BBRAM). ❏ The Board Information Block in NVRAM contains various entries that define operating parameters of the board hardware.
Modifying the Environment Artwork (PWA) Identifier = " " MPU Clock Speed = " " Ethernet Address = 0001AF00000 Local SCSI Identifier = " " Optional Board 1 Artwork (PWA) Identifier = " Optional Board 1 (PWA) Serial Number = " " Optional Board 2 Artwork (PWA) Identifier = " Optional Board 2 (PWA) Serial Number = " " 177-Bug> 3 " " The parameters that are quoted are left-justified character (ASCII) strings padded with space characters, and the quotes (") are displayed to indicate the size of the string.
177Bug Firmware ENV - Set Environment Use the ENV command to view and/or configure interactively all 177Bug operational parameters that are kept in Non-Volatile RAM (NVRAM). 3 Refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual for a description of the use of ENV. Additional information on registers in the MVME177P that affect these parameters appears in your MVME1X7P Single Board Computers Programmer’s Reference Guide.
Modifying the Environment Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options Default Meaning of Default Local SCSI Bus Reset on Debugger Startup [Y/N] N No local SCSI bus reset on debugger startup. Local SCSI Bus Negotiations Type [A/S/N] A Asynchronous negotiations. Ignore CFGA Block on a Hard Disk Boot [Y/N] Y Configuration Area (CFGA) Block contents are disregarded at boot (hard disk only). Auto Boot Enable [Y/N] N Auto Boot function is disabled.
177Bug Firmware Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options 3 Default Meaning of Default Network Auto Boot at power-up only [Y/N] Y Network Auto Boot is attempted at power-up reset only. Network Auto Boot Controller LUN 00 Specifies LUN of a disk/tape controller module currently supported by the Bug. Default is $0. Network Auto Boot Device LUN 00 Specifies LUN of a disk/tape device currently supported by the Bug. Default is $0.
Modifying the Environment Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options Memory Search Increment Size Memory Search Delay Enable [Y/N] Memory Search Delay Address Memory Size Enable [Y/N] Default Meaning of Default 00010000 Multi-CPU feature used to offset the location of the Bug work page. This must be a multiple of the debugger work page, modulo $10000 (64KB). Typically, Memory Search Increment Size is the product of CPU number and size of the Bug work page.
177Bug Firmware Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options 3 Default Meaning of Default Note Memory Configuration Defaults. The default configuration for Dynamic RAM mezzanine boards will position the mezzanine with the largest memory size to start at the address selected with the ENV parameter "Base Address of Dynamic Memory". The Base Address parameter defaults to 0. The smaller sized mezzanine will follow immediately above the larger in the memory map.
Modifying the Environment Table 3-3. ENV Command Parameters (Continued) Default Meaning of Default Slave Address Translation Address #1 ENV Parameter and Options 00000000 This register allows the VMEbus address and the local address to differ. The value in this register is the base address of the local resource that is associated with the starting and ending address selection from the previous questions. Default is 0.
177Bug Firmware Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options 3 Default Meaning of Default Master Control #1 0D Defines the access characteristics for the address space defined with this master address decoder. Default is $0D. Master Enable #2 [Y/N] N Do not set up and enable Master Address Decoder #2. Master Starting Address #2 00000000 Base address of the VMEbus resource that is accessible from the local bus. Default is $00000000.
Modifying the Environment Table 3-3. ENV Command Parameters (Continued) Default Meaning of Default Master Ending Address #4 ENV Parameter and Options 00000000 Ending address of the VMEbus resource that is accessible from the local bus. Default is $0. Master Address Translation Address #4 00000000 This register allows the VMEbus address and the local address to differ.
177Bug Firmware Table 3-3. ENV Command Parameters (Continued) ENV Parameter and Options 3 Default Meaning of Default VMEC2 GCSR Board Base Address 00 Specifies base address ($FFFFD2XX) in Short I/O for this board. Default = $00. VMEbus Global Time Out Code 01 Controls VMEbus timeout when the MVME177P is system controller. Default $01 = 64 µs. Local Bus Time Out Code 02 Controls local bus timeout. Default $02 = 256 µs.
4Functional Description 4 Introduction This chapter describes the MVME177P Single-Board Computer on a block diagram level. The Summary of Features provides an overview of the MVME177P, followed by a detailed description of several blocks of circuitry. Figure 4-1 shows a block diagram of the overall board architecture. Detailed descriptions of other MVME177P blocks, including programmable registers in the ASICs and peripheral chips, can be found in the Programmer’s Reference Guide (part number V1x7PA/PG).
Functional Description Table 4-1.
Summary of Features All boards are available with 128KB of SRAM (with battery backup); time-of-day clock (with battery backup); an Ethernet transceiver interface; four serial ports with EIA-232-D DTE interface; bidirectional parallel port; four tick timers with watchdog timer(s); two EPROM sockets; Flash memory; SCSI bus interface with DMA; and a VMEbus interface (local bus to VMEbus/VMEbus to local bus, with A16/A24/A32, D8/D16/D32 bus widths and a VMEbus system controller).
Functional Description Block Diagram The block diagram in Figure 4-1 on page 4-5 illustrates the MVME177P’s overall architecture. 4 Functional Description This section contains a functional description of the major blocks on the MVME177P. Data Bus Structure The local data bus on the MVME177P is a 32-bit synchronous bus that is based on the MC68060 bus, and which supports burst transfers and snooping. The various local bus master and slave devices use the local bus to communicate.
Functional Description VMEchip2 VMEbus Interface 128KB SRAM Battery Option P1 EPROM 2 44-pin PLCC 4MB FLASH 82596CA33 Ethernet Controller 50/60MHz MC68060 MPU 53C710 SCSI Coprocessor PETRA 16-128MB ECC SDRAM Memory Array P2 Centronics Compatible Parallel I/O Port M48T58 Battery Backed 8KB RAM/Clock PCCchip2 CD2401 Quad Serial I/O Controller Mezzanine Connectors Up to 128MB ECC DRAM 4-5 http://www.motorola.com/computer/literature 4 2830 0900 Figure 4-1.
Functional Description Memory Options The following memory options are available on the different versions of MVME177P boards. DRAM 4 MVME177P boards are built with 16MB, 32MB, 64MB, or 128MB synchronous DRAM (SDRAM). The MVME177P may have the SDRAM configured to model 4MB, 8MB, 16MB, 32MB, 64MB, or 128MB of ECC-protected DRAM. The SDRAM memory array itself is always a single-bit error correcting and multi-bit error detection memory, irrespective of which interface model you use to access the SDRAM.
Functional Description the second 1MB space (which is reserved for future expansion). The EPROMs may either coexist with this 2MB of Flash, or can be used to program all 4MB of Flash (after which configuration switch S4 could be reset to make only Flash available). After a system reset, the EPROMs are mapped to the default addresses $00000 through $FFFFF. They may be mapped to $FF800000 through $FF8FFFFF if necessary.
Functional Description Table 4-2. EPROM/Flash Control and Configuration 4 Switch S4 Segment 2 VMEchip2 bit GPIO2 ON Low 2MB EPROM (lower) and 2MB Flash (upper). First 2MB Flash accessible (Note). ON High 2MB EPROM (lower) and 2MB Flash (upper). Second 2MB Flash accessible (Note). OFF N/A All 4MB Flash. Note Memory Configuration These 2MB of Flash will follow the EPROMs in memory if S4 segment 2 is set to OFF.
Functional Description package. The clock provides seconds, minutes, hours, day, date, month, and year in BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day months are made automatically. No interrupts are generated by the clock. Although the M48T58 is an 8-bit device, the interface provided by the PCCchip2 ASIC supports 8-, 16-, and 32-bit accesses to the M48T58.
Functional Description All four serial ports use EIA-232-D drivers and receivers located on the main board, and all the signal lines are routed to the P2 I/O connector. The configuration headers are located on the main board and may be on some transition boards. An external I/O transition board is necessary to convert the I/O connector pinout to industry-standard connectors. 4 Note The MVME177P board hardware ties the DTR signal from the CD2401 to the pin labeled RTS at connector P2.
Functional Description When used as a parallel printer port, the five status pins function as: Printer Acknowledge (ACK), Printer Fault (FAULT∗), Printer Busy (BSY), Printer Select (SELECT), and Printer Paper Error (PE); while the control pins act as Printer Strobe (STROBE∗), and Input Prime (INP∗). The PCCchip2 provides an auto-strobe feature similar to that of the MVME147 PCC.
Functional Description The Ethernet transceiver interface is located on the MVME177P main board, and the industry-standard DB15 connector is located on the MVME712 series transition board. Support functions for the 82596CA LAN coprocessor are provided by the PCCchip2 ASIC. Refer to the 82596CA user’s guide and to the Programmer’s Reference Guide for detailed programming information. 4 SCSI Interface The MVME177P has provision for mass storage subsystems through the industry-standard SCSI bus.
Functional Description Programmable Tick Timers Four 32-bit programmable tick timers with 1µs resolution are available: two in the VMEchip2 ASIC and two in the PCCchip2 ASIC. The tick timers may be programmed to generate periodic interrupts to the processor. Refer to the VMEchip2 and PCCchip2 descriptions in the Programmer’s Reference Guide for detailed programming information. Watchdog Timer A watchdog timer function is provided in the VMEchip2 ASIC.
Functional Description Local Bus Arbiter The local bus arbiter implements a fixed priority (see Table 4-3). Table 4-3. Local Bus Arbitration Priority Device 4 Priority Note LAN 0 Highest Serial I/O 1 SCSI 2 ... VMEbus 3 Next Lowest MC68060 MPU 4 Lowest Connectors The MVME177P has two 96-position DIN connectors: P1 and P2. P1 rows A, B, C, and P2 row B provide the VMEbus interconnection. P2 rows A and C provide the connection to the SCSI bus, serial ports, and Ethernet.
5Pin Assignments 5 Connector Pin Assignments This chapter summarizes the pin assignments for the following groups of interconnect signals on the MVME177P: Connector Location Table Remote Reset connector J3 Table 5-1 VMEbus connector P1 P1 Table 5-2 VMEbus connector P2 P2 Table 5-3 The tables in this chapter furnish pin assignments only. For detailed descriptions of the interconnect signals, consult the support information for the MVME177P (available through your Motorola sales office).
Pin Assignments Remote Reset Connector - J3 The MVME177P has a 20-pin connector (J3) mounted behind the front panel. When the MVME177P board is enclosed in a chassis and the front panel is not visible, this connector enables you to extend the reset, abort and LED functions to the control panel of the system, where they remain accessible. Table 5-1.
VMEbus Connectors - P1, P2 Table 5-2.
Pin Assignments Table 5-3.
ASpecifications A Board Specifications The following table lists the general specifications for the MVME177P VME single-board computer. The subsequent sections detail cooling requirements and EMC regulatory compliance. A complete functional description of the MVME177P boards appears in Chapter 4. Table A-1. MVME177P Specifications Characteristics Specifications Power requirements +5Vdc (±5%), 1.75A typical, 2.
A Specifications Cooling Requirements The Motorola MVME177P VME Embedded Controller is specified, designed, and tested to operate reliably with an incoming air temperature range from –5° to 55° C (23° to 131° F) with forced air cooling of the entire assembly (base board and mezzanine, if present) at a velocity typically achievable by using a 100 CFM axial fan. Temperature qualification is performed in a standard Motorola VME system chassis.
BTroubleshooting B Solving Startup Problems In the event of difficulty with your MVME177P VME embedded controller, try the simple troubleshooting steps on the following pages before calling for help or sending the board back for repair. Some of the procedures will return the board to the factory debugger environment. (The board was tested under these conditions before it left the factory.) The selftests may not run in all user-customized environments. Table B-1.
Troubleshooting Table B-1. Troubleshooting MVME177P Boards (Continued) B Condition Possible Problem Try This: II. There is a display on the terminal, but input from the keyboard has no effect. A. The keyboard may be connected incorrectly. Recheck the keyboard connections and power. B. Board jumpers or switches may be configured incorrectly. Verify the settings of the board jumpers and configuration switches as described in this manual. C.
Solving Startup Problems Table B-1. Troubleshooting MVME177P Boards (Continued) Condition Possible Problem IV. Continued V. The debugger is in system mode and the board autoboots, or the board has passed self-tests. B Try This: 2. At the command line prompt, type in: env;d This restores the default parameters for the debugger environment. 3. When prompted to Update Non-Volatile RAM, type in: y 4. When prompted to Reset Local System, type in: y 5.
Troubleshooting Table B-1. Troubleshooting MVME177P Boards (Continued) B Condition Possible Problem Try This: VI. The board has failed one or more of the tests listed above, and cannot be corrected using the steps given. A. There may be some fault in the board hardware or the on-board debugging and diagnostic firmware. 1. Document the problem and return the board for service. 2. Phone 1-800-222-5640. TROUBLESHOOTING PROCEDURE COMPLETE.
CNetwork Controller Data C Network Controller Modules Supported The 177Bug firmware supports the following VMEbus network controller modules. The default address for each module type and position is shown to indicate where the controller must reside to be supported by 177Bug. The controllers are accessed via the specified CLUN and DLUNs listed here.
Network Controller Data C C-2 Computer Group Literature Center Web Site
DDisk/Tape Controller Data D Controller Modules Supported The following VMEbus disk/tape controller modules are supported by the 177Bug firmware. The default address for each controller type is First Address. The controller can be addressed by First CLUN during execution of the BH, BO, or IOP commands, or during execution of the .DSKRD or .DSKWR TRAP #15 calls.
Disk/Tape Controller Data Default Configurations Note D SCSI Common Command Set (CCS) devices are the only ones tested by Motorola Computer Group.
Default Configurations MVME323 -- 4 Devices Controller LUN Address 8 $FFFFA000 9 $FFFFA200 Device LUN 0 1 2 3 Device Type ESDI Winchester hard drive ESDI Winchester hard drive ESDI Winchester hard drive D ESDI Winchester hard drive MVME327A -- 9 Devices Controller LUN Address 2 $FFFFA600 3 $FFFFA700 Device LUN Device Type 00 10 20 30 40 50 60 SCSI Common Command Set (CCS), which may be any of these: - Fixed direct access - Removable flexible direct access (TEAC style) - CD-ROM - Sequent
Disk/Tape Controller Data MVME328 -- 14 Devices Controller LUN D Address 6 $FFFF9000 7 $FFFF9800 16 $FFFF4800 17 $FFFF5800 18 $FFFF7000 19 $FFFF7800 Device LUN Device Type 00 08 10 18 20 28 30 SCSI Common Command Set (CCS), which may be any of these: - Removable flexible direct access (TEAC style) - CD-ROM - Sequential access 40 48 50 58 60 68 70 Same as above, but these will only be available if the daughter card for the second SCSI channel is present.
IOT Command Parameters IOT Command Parameters The following table lists the proper IOT command parameters for floppies used with boards such as the MVME328 and MVME177P.
Disk/Tape Controller Data D D-6 Computer Group Literature Center Web Site
ERelated Documentation E MCG Documents The Motorola Computer Group publications listed below are referenced in this manual. You can obtain paper or electronic copies of MCG publications by: ❏ Contacting your local Motorola sales office ❏ Visiting MCG’s World Wide Web literature site, http://www.motorola.com/computer/literature .. Table E-1.
Related Documentation Manufacturers’ Documents For additional information, refer to the following table for manufacturers’ data sheets or user’s manuals. As a further help, sources for the listed documents are also provided. Please note that in many cases, the information is preliminary and the revision levels of the documents are subject to change without notice. Table E-2.
Related Specifications Table E-2. Manufacturers’ Documents (Continued) Document Title and Source Z85230 Serial Communications Controller Product Brief Zilog Inc. 210 Hacienda Avenue Campbell, CA 95008-6609 Web: http://www.zilog.com/products Publication Number Z85230pb.pdf E Related Specifications For additional information, refer to the following table for manufacturers’ data sheets or user’s manuals. As a further help, sources for the listed documents are also provided.
Related Documentation Table E-3. Related Specifications (Continued) Publication Number Document Title and Source OR Microprocessor system bus for 1 to 4 byte data Bureau Central de la Commission Electrotechnique Internationale 3, rue de Varembé Geneva, Switzerland IEC 821 BUS E ANSI Small Computer System Interface-2 (SCSI-2), Draft Document X3.131198X, Revision 10c Global Engineering Documents 15 Inverness Way East Englewood, CO 80112-5704 X3.131-198X Rev.
Index Numerics 177Bug disk/tape controller data D-1 firmware 3-8 implementation 3-3 network controller data C-1 overview 3-1 stack space 3-4 27D4002 EPROM 3-3 53C710 SCSI controller 4-11 82596CA LAN coprocessor 4-11 A abort process 2-12 ABORT switch 4-14 aborting program execution 2-1 address/data configurations 1-14 addressing modes 1-13 altitude (operating) A-1 ambient air temperature (effect on cooling) A-2 arbitration priority 4-14 arguments, firmware command 3-5 autoboot process 2-8 autojumpering (VM
Index configuring 177Bug parameters 3-10 hardware 2-5 VMEbus interface 3-14 connector pin assignments 5-1 connectors 4-14 console port 2-6 control/status registers 1-14 controller LUN (CLUN) C-1, D-1 controller modules (disk/tape) D-1 controller modules (network) C-1 cooling requirements A-2 D data bus structure 4-4 data sheets E-2 date and time, setting 2-7, B-2 debugger commands 3-5 firmware (177Bug) 3-8 prompt 3-4 decimal number, symbol for xvii default baud rate 2-7 device LUN (DLUN) C-1, D-2 diagnost
I I/O interfaces 4-9 IACK (interrupt acknowledge) signal 1-12 initial conditions 2-4 installation considerations 1-14 instructions 1-11 MVME177P board 1-11 transition modules 1-12 interconnect signals 5-1 interrupt acknowledge signal (IACK) 1-12 Interrupt Stack Pointer (ISP) 3-4 interrupts, hardware 4-13 IOT command parameters D-5 J J3 connector 4-14 jumper headers J1 (general-purpose readable jumpers) 1-5, 2-5 J10/J11 (serial port 4 clock configuration) 1-8, 2-6 J6 (system controller selection) 1-7, 2-5 J
Index parallel printer port 4-10 parameters, ENV command 3-10 PCCchip2 ASIC control of BBRAM and clock 4-8 LAN coprocessor support 4-11 SCSI controller support 4-12 Petra SDRAM size switch (S3) 1-9, 2-6 pin assignments, connector 5-1 port number(s), debugger command 3-5 power requirements A-1 powering up the board 2-1 printer interface 4-10 printer port 4-10 processor location monitors 1-14 programmable tick timers 4-12 Q QIC-02 streaming tape drive D-4 R related specifications E-3 relative humidity A-1
T temperature operating A-1 storage A-1 terminal configuration 2-4 input/output control 3-4 tick timers 4-12 timeout global bus 1-14 local bus 4-13 transition modules and serial I/O 4-9 MVME712B 1-11 MVME712M 1-11 troubleshooting procedures B-1 TRXC4 (Transmit Receive Clock 4) 1-8 types of reset 2-11 U unpacking instructions 1-3 V vibration tolerance (operating) A-1 VMEbus connectors 4-14 interface 4-9 signals 5-2 VMEchip2 ASIC 4-9 VMEchip2 LCSR (Local Control and Status registers) 1-5, 2-5 W watchdog ti
Index I N D E X IN-6 Computer Group Literature Center Web Site
