Technical data

4-10 Computer Group Literature Center Web Site
Functional Description
4
All four serial ports use EIA-232-D drivers and receivers located on the
main board, and all the signal lines are routed to the P2 I/O connector. The
configuration headers are located on the main board and may be on some
transition boards. An external I/O transition board is necessary to convert
the I/O connector pinout to industry-standard connectors.
Note The MVME177P board hardware ties the DTR signal from the
CD2401 to the pin labeled RTS at connector P2. Likewise, RTS
from the CD2401 is tied to DTR on P2. Therefore, when
programming the CD2401, assert DTR when you want RTS, and
RTS when you want DTR.
The interface provided by the PCCchip2 ASIC allows the 16-bit CD2401
to appear at contiguous addresses; however, accesses to the CD2401 must
be 8 or 16 bits. 32-bit accesses are not permitted. Refer to the CD2401 data
sheet and to the PCCchip2 description in the Programmer’s Reference
Guide for detailed programming information.
The CD2401 supports DMA operations to local memory. Because the
CD2401 does not support a retry operation necessary to break VMEbus
lockup conditions, the CD2401 DMA controllers should not be
programmed to access the VMEbus. The hardware does not restrict the
CD2401 to onboard DRAM.
Parallel Port Interface
The PCCchip2 ASIC provides an 8-bit bidirectional parallel port. All eight
bits of the port must be either inputs or outputs (no individual selection).
In addition to the 8 bits of data, there are two control pins and five status
pins. Each of the status pins can generate an interrupt to the MPU in any
of the following programmable conditions: high level, low level,
high-to-low transition, or low-to-high transition. This port may be used as
a Centronics-compatible parallel printer port or as a general parallel I/O
port.