PrPMC800/800ET Processor PMC Module Installation and Use PRPMC800A/IH5 June 2006 Edition
© Copyright 2001, 2002, 2003, 2006 Motorola, Inc. All Rights Reserved. Printed in the United States of America. Motorola and the Motorola symbol are registered trademarks of Motorola, Inc. CompactPCI is a registered trademark of PCI Industrial Computer Manufacturers Group. All other products mentioned in this document are trademarks or registered trademarks of their respective holders.
Safety Summary The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. The safety precautions listed below represent warnings of certain dangers of which Motorola is aware.
Warning To prevent serious injury or death from dangerous voltages, use extreme caution when handling, testing, and adjusting this equipment and its components. Flammability All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating of 94V0 by UL-recognized manufacturers. EMI Caution ! Caution This equipment generates, uses and can radiate electromagnetic energy.
Notice While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
Contents About This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv 1 Preparation and Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PrPMC800/800ET Description . . . . . . . . . . . . . .
Contents ECC Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Onboard SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10BaseT/100BaseTX Ethernet Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents 6 Modifying the Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CNFG – Configure Board Information Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ENV – Set Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents x PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
List of Figures Figure 1-1. Figure 1-2. Figure 2-3. Figure 3-1. Figure 3-2. Figure B-1. Figure B-2. Figure B-3. Figure B-4. PrPMC800/800ET Headers, Connectors and Components . . . . . . . . . . . . . . . . . . . . . . . 6 Installing a PrPMC800/800ET on a VMEmodule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 PrPMC800/800ET Debug Serial Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PrPMC800/800ET Block Diagram . . . . . . . . . . . . . . . . . . . . . . .
List of Figures xii PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
List of Tables Table 2-1. Table 2-2. Table 1-3. Table 1-4. Table 3-1. Table 3-2. Table 3-3. Table 3-4. Table 4-1. Table 4-2. Table 4-3. Table 4-4. Table 4-5. Table 4-6. Table 4-7. Table 4-8. Table 5-1. Table 5-2. Table A-1. Table B-1. Table C-1. Table C-2. Table C-3. PrPMC800/800ET Models/Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Tables xiv PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
About This Manual PrPMC800/800ET Processor PMC Module Installation and Use provides information for installation and configuration of the PrPMC800/800ET, including jumper settings and installation procedures. It also includes descriptions of various components’ functions, connector pinout information, and a general description of the PPCBug firmware used with the board.
About This Manual Table 2-1.
About This Manual Summary of Changes The following changes have been made to this manual. Table 2-2. Date Doc. Rev. Changes 6/2006 PRPMC800A/IH5 Updated Model and Configuration Table per EOL product list. 9/2003 PRPMC800A/IH4 Updates include processor core frequencies, Ethernet chip to include 82551IT, board temperature specifications. New model numbers were added to the Models/Configurations table to reflect the availability of industrial temperature board configurations.
About This Manual Overview of Contents Chapter 1, Preparation and Installation, provides a general description of the PrPMC800/800ET including a summary of the basic features and architecture. It also includes a brief discussion of the monarch and non-monarch use of this board, and the carrier board requirements when the PrPMC800/800ET is being used as a monarch.
About This Manual Conventions Used in This Manual The following typographical conventions are used in this document: bold is used for user input that you type just as it appears. Bold is also used for commands, options and arguments to commands, and names of programs, directories and files. italic is used for names of variables to which you assign values. Italic is also used for comments in screen displays and examples, and to introduce new terms.
About This Manual The MPU on the board is programmed to big-endian byte ordering. Any attempt to use littleendian byte ordering will immediately render the debugger unusable. Note All references to processor bus support via the Harrier ASIC relate specifically to the MPC60x-class bus mode. They do not imply support of any other PowerPC-architecture bus mode.
1 Preparation and Installation 1 Introduction This chapter provides a brief description of the PrPMC800/800ET Processor PMC Module, and instructions for preparing and installing the hardware. In this manual, the name PrPMC800/800ET refers to all models of the PrPMC800/800ET series boards, unless otherwise specified. These are add-on modules intended for use with any host carrier board that accepts a PMC or PrPMC module.
1 Preparation and Installation Monarch and Non-Monarch PrPMCs The traditional concept of host/master and slave/target processors changes with the inception of the PrPMC because of the arbiter and clock source. Traditionally located on the host board, these functions are not part of the PrPMC800/800ET. The VITA 32 specification defines the terms monarch and non-monarch to refer to these two modes of operation for PrPMCs.
1 Preparation and Installation Overview of Start-Up Procedures The following table lists the things you need to do before you can use this board and tells where to find the information you need to perform each step. Be sure to read this entire chapter, including all Cautions and Warnings, before you begin. Table 1-3. Start-Up Overview What you need to do ... Refer to ... On page ... Unpack the hardware.
1 Preparation and Installation Unpacking the Hardware Note If the shipping carton(s) is/are damaged upon receipt, request that the carrier’s agent be present during the unpacking and inspection of the equipment. Unpack the equipment from the shipping carton(s). Refer to the packing list(s) and verify that all items are present. Save the packing material for storing and reshipping of equipment. Avoid touching areas of integrated circuitry; static discharge can damage circuits.
1 Preparation and Installation Harrier Power-Up Configuration Header A 2mm, 16-pin low profile header located on side 1 of the PrPMC800/800ET provides the means to change some of the Harrier power-up configuration settings. The pin assignments for this header, along with the power-up setting with the jumper on or off, are as follows (boards are shipped with all jumpers off): Table 1-4.
1 Preparation and Installation J3 15 1 U2 U6 2 1 16 2 1 J2 15 L3 J1 U10 19 20 U1 L5 U9 T1 U8 U5 U4 U7 1 P11 2 1 2 P12 63 1 64 2 63 1 64 2 P13 63 64 P14 63 64 Figure 1-1.
1 Preparation and Installation Installation The following instructions tell how to install the PrPMC800/800ET on a typical VME or CompactPCI single board computer. The PrPMC800/800ET can also be installed on an ATX form factor carrier board that is equipped with industry standard PMC slots. ESD Precautions Use ESD Wrist Strap Motorola strongly recommends that you use an antistatic wrist strap and a conductive foam pad when installing or upgrading a system.
1 Preparation and Installation Figure 1-2. Installing a PrPMC800/800ET on a VMEmodule 8 5. Align the standoffs on the PrPMC800/800ET mezzanine with the VMEmodule or CompactPCI board. Install the Phillips-head screws through the holes in the baseboard and the spacers. Tighten the screws. 6. Install the VME or CompactPCI assembly in its proper card slot. Ensure the module is seated properly in the backplane connectors. Do not damage or bend connector pins. 7.
2 Operating Instructions 2 Introduction This chapter provides information about powering up the PrPMC800/800ET system, and functionality of the status indicators, and I/O ports on the PrPMC800/800ET module. Applying Power After you have verified that all necessary hardware preparation has been done, that all connections have been made correctly, and that the installation is complete, you can power up the system.
2 Operating Instructions STARTUP INITIALIZATION POST Power-up/reset initialization Initialize devices on the PrPMC800/800ET module/system Power On Self Test diagnostics BOOTING Firmware-configured boot mechanism, if so configured. Default is no boot. MONITOR Interactive, command-driven on-line PowerPC debugger, when terminal connected.
2 Operating Instructions Debug Serial Port A three-wire debug serial RS-232 port (TXD, RXD, GND) is available on the 2mm, 20-pin rightangle header (J1) located on the primary side of the PrPMC800/800ET. Refer to Figure 2-3 for pin definitions. An optional J1-to-DB9 adapter cable is available from Motorola. Contact your local Motorola Sales Office or Distributor for more information or to order cable part number: PrPMC-CABLE-001.
3 Functional Description 3 Introduction This chapter describes the PrPMC800/800ET Processor PMC Module on a block diagram level. The General Description provides an overview of the PrPMC800/800ET, followed by a detailed description of several blocks of circuitry. Figure 3-1 on page 15 shows a block diagram of the overall board architecture.
3 Functional Description Table 3-1. PrPMC800/800ET Features (continued) Feature Description PCI Interface 32/64-bit Data 33 MHz minimum, 66 MHz capable on certain models 3.
3 Functional Description The PrPMC800/800ET module can function as a system controller (monarch mode) for the host board or as a slave processor (non-monarch) PMC, depending on the state of the MONARCH# signal from the PMC connector. When configured as the monarch, the PrPMC800/800ET’s PPCBug enumerates the PCI bus as well as monitor and service the four PCI interrupts. Block Diagram The following figure is a block diagram of the PrPMC800/800ET’s overall architecture 3.
3 Functional Description Processor The PrPMC800/800ET board can be ordered with one of the following low-power/low care voltage processor chips: 450 MHz MPC750-class, 450MHz or 500MHz MCP7410, or a 400 MHz MPC7410 (N). L2 Cache The PrPMC800/800ET utilizes a backside L2 cache structure via the MPC750-class or MPC7410 processor chip families. The L2 cache is implemented with an on-chip, 2-way setassociative tag memory and external direct-mapped synchronous SRAMs for data storage.
3 Functional Description Harrier Power-Up Configuration The Harrier ASIC XAD30-XAD0 pins provide configuration information for Harrier at power-up reset time. The following table lists the default power-up reset state of these pins for the PrPMC800/800ET module. The Select Option column indicates whether the power-up setting can be changed by jumper, or if the setting is fixed and cannot be changed. The Default PowerUp Setting column indicates the default values for the standard PrPMC800/800ET product.
3 Functional Description Table 3-2. Harrier Power-Up Configuration Settings (continued) Harrier XAD Bus Signal Select Option Default PowerUp Setting Function/ Register Bit Description XAD[23] Jumper J2 pins 7-8 1 Generic power up status bit 3 XCSR.GCSR.PUST 3 Software readable header bit 3 XAD[22] Jumper J2 pins 5-6 1 Generic power up status bit 2 XCSR.GCSR.PUST 2 Software readable header bit 2 XAD[21] Jumper J2 pins 3-4 1 Generic power up status bit 1 XCSR.GCSR.
3 Functional Description Table 3-2. Harrier Power-Up Configuration Settings (continued) Harrier XAD Bus Signal Select Option Default PowerUp Setting Function/ Register Bit Description XAD[9] BankB_SEL x Xport channel 0 reset vector source Enable/Disable (1/0) Xport channel 0 (flash bank A) as reset vector source, depending on state of baseboard jumper. XAD [8:7] Fixed 11 Xport channel 1 data width XCSR.XPAT1.DW Set Xport channel 1 (flash bank B) to 16-bit width, Hawk addressing mode.
3 Functional Description Onboard Bank A Flash The PrPMC800/800ET contains one bank of 32MB of flash memory on Xport 0 configured for 16-bit mode. Bank A consists of two Intel StrataFlash (28F128J3A) +3.3 volt devices configured to operate in 8-bit mode. These Intel StrataFlash devices support page read mode operations with an 8-byte page size per device.
3 Functional Description Harrier I2C port 0 is also routed to pins on the P14 PMC user I/O connector. The connection to the PMC connector provides a means to interface to an optional configuration SROM on the baseboard. This allows the PrPMC800/800ET to determine hardware configuration information from the baseboard. Refer to the Harrier ASIC Programmer’s Reference Guide for SROM device address assignments.
3 Functional Description Watchdog Timers The Harrier ASIC contains two Watchdog timers, WDT0 and WDT1. Each timer is functionally equivalent but independent. These timers continuously decrement until they reach a count of 0 or are reloaded by software. The time-out period is programmable from 1 microsecond up to 32 minutes. If the timer count reaches 0, a timer output signal is asserted. The output of Watchdog Timer 0 is routed to an MPIC interrupt.
3 Functional Description PrPMC800/800ET Power Supplies The PrPMC800/800ET module requires only a +3.3V input voltage. The processor core voltage and the Harrier core voltage are generated on the module from the +3.3V input using the LTC1702 dual synchronous switching regulator. In addition to the Harrier core voltage, the +2.5V supply provides the processor, Harrier, and L2 cache I/O voltages. Module Reset Logic A block diagram of the PrPMC800/800ET module reset logic appears in Figure 3-2 on page 24.
SRESET_L TRST_L HRESET_L SRST0_L WDT1TO_L J1-11 P14-13 RWSRESEST_L RWCPUTSRT_L J1-4 P14-7 P14-14 J1-13 RWCPURST_L AUXRST_L RST_L PCIRST_L P12-13 REQ64 LOGIC ABTSW_L ABORT_L J1-18 P14-42 RSTSW_L DEBUGRST_L J1-17 MCSR.RSTOUT HRST0_L RSTOUT_L PURST_L Power Up Reset (140ms) Harrier ASIC RESETOUT_L MPC750-Class Processor P12-60 3 Functional Description Figure 3-2.
3 Functional Description The following special function processor PMC pins, as defined by the draft Processor PMC Standard VITA-32-199x, are implemented on the PrPMC800/800ET as described in the following sections. PRESENT# Signal The PRESENT# signal on the PrPMC800/800ET module is grounded to indicate to the baseboard that the module is installed. MONARCH# Signal The MONARCH# input signal allows the baseboard to enable the monarch system controller features on the PrPMC800/800ET module.
3 Functional Description EREADY Signal The Processor PMC PCI bus Enumeration Ready (EREADY) signal is connected to the Harrier EREADY pin. Harrier can drive this open drain signal and monitor its state using the Harrier EREADY and EREADYS status bits. This pin is asserted low by Harrier at power-up and must be deasserted by software control. PCI Signaling Voltage Level The PrPMC800/800ET module is a universal PMC module that will operate with +3.3V or +5V PCI signaling levels.
3 Functional Description Memory Maps Refer to the PrPMC800/800ET Processor PMC Module Programmer’s Reference Guide for memory maps of the PrPMC800/800ET processor module. The PrPMC800/800ET is a derivative of the Single Board Computer (SBC) family compatible with the PowerPlus III architecture. The programming model presented in the PrPMC800/800ET Programmer’s Reference Guide is based on the PowerPlus III architecture.
4 Connector Pin Assignments 4 Introduction This chapter provides connector pin assignments for all connectors on the PrPMC800/800ET board. PCI Mezzanine Card (PMC) Connectors There are four 64-pin EIA E700 AAAB SMT connectors (P11, P12, P13, and P14) on the PrPMC800/800ET that provide the 32/64-bit PCI interface and optional I/O interface to the host board. The P14 connector provides an interface to the bank B flash and I2C bus along with a secondary interface to the serial port and the JTAG/COP port.
4 Connector Pin Assignments Table 4-1.
4 Connector Pin Assignments Table 4-2. PMC Connector P12 Pin Assignments P12 1 +12V (No Connect) TRST# 2 3 TMS TDO 4 5 TDI GND 6 7 GND No Connect 8 9 No Connect No Connect 10 11 MOT_RSVD +3.3V 12 13 RST# MOT_RSVD 14 15 +3.3V MOT_RSVD 16 17 No Connect GND 18 19 AD30 AD29 20 21 GND AD26 22 23 AD24 +3.3V 24 25 IDSEL AD23 26 27 +3.3V AD20 28 29 AD18 GND 30 31 AD16 C/BE2# 32 33 GND IDSELB 34 35 TRDY# +3.
4 Connector Pin Assignments Table 4-3.
4 Connector Pin Assignments Table 4-4.
4 Connector Pin Assignments Signal Description for P14 34 I2CSDA: I2C bus serial data I2CSCL: I2C bus clock TXD: RS-232 serial port transmit data RXD: RS-232 serial port receive data CPUTDI: Processor RISCwatch TDI CPUTDO: Processor RISCwatch TDO CPUTRST_L: Processor RISCwatch Test Reset CPUTCK: Processor RISCwatch Test Clock CPUTMS: Processor RISCwatch Test Mode Select SRESET_L: Processor RISCwatch Soft Reset CPURST_L: Processor RISCwatch CPU Reset CHKSTPO_L: Processor RISCWatch C
4 Connector Pin Assignments Ethernet Adapter Connector An AMP 15-pin INFOPORT Series III PC card, low profile connector is located on the front edge of the PrPMC800/800ET to provide a front side interface to the Ethernet channel. An external PC card RJ45 adapter cable is required to provide a standard RJ45 Ethernet interface. The pin assignments for this header are as follows. Table 4-5.
4 Connector Pin Assignments Table 4-6.
4 Connector Pin Assignments Harrier Power-Up Configuration Header A 2mm, 16-pin low profile header located on side one of the PrPMC800/800ET provides the means to change some of the Harrier power-up configuration settings. The pin assignments for this header, along with the power-up setting with the shunt on or off, are as follows. Table 4-7. J2 Harrier Power-Up Configuration Header Pin Assignments J2 Shunt On Shunt Off 1 XAD[20] termination GND 2 PUST0 = 0 Harrier PUST Bit 0 in GCSR Register.
4 Connector Pin Assignments Debug Serial Port Cable The following cable pinout information is provided for those using the debug serial port cable in conjunction with the operation of the PrPMC800/800ET. Table 4-8. PrPMC Cable-001 Termination 38 Signal Name 2mm 20-Receptacle Pin (TCSD-10-01) Mating Connector Mating Connector Pin CPUTDO 1 1 CPUTDI 3 .100’x.
5 PPCBug 5 Overview The PPCBug firmware is the layer of software just above the hardware. The firmware provides the proper initialization for the devices on the PrPMC800/800ET module upon power-up or reset. This chapter describes the basics of PPCBug and its architecture, describes the monitor (interactive command portion of the firmware) in detail, and gives information on actually using the PPCBug debugger and the special commands. A complete list of PPCBug commands appears at the end of the chapter.
5 PPCBug PPCBug includes commands for: ❏ Display and modification of memory ❏ Breakpoint and tracing capabilities ❏ A powerful assembler and disassembler useful for patching programs ❏ A self-test at power-up feature which verifies the integrity of the system PPCBug consists of three parts: ❏ A command-driven, user-interactive software debugger, described in the PPCBug Firmware Package User’s Manual. It is hereafter referred to as “the debugger” or “PPCBug”.
5 PPCBug Physically, PPCBug is contained in two on-board flash devices that together provide 32MB of storage. The executable code is checksummed at every power-on or reset firmware entry, and the result (which includes a precalculated checksum contained in the flash devices), is verified against the expected checksum. MPU, Hardware, and Firmware Initialization The debugger performs the MPU, hardware, and firmware initialization process.
5 PPCBug 25. Verifies the configuration data that is resident in NVRAM, and displays a warning message if the verification failed. 26. Calculates and displays the MPU clock speed, verifies that the MPU clock speed matches the configuration data, and displays a warning message if the verification fails. 27. Displays the BUS clock speed, verifies that the BUS clock speed matches the configuration data, and displays a warning message if the verification fails. 28. Probes PCI bus for supported network devices.
5 PPCBug Debugger Commands The individual debugger commands are listed in the following table. The commands are described in detail in the PPCBug Firmware Package User’s Manual. You can list all the available debugger commands by entering the Help (HE) command alone. You can view the syntax for a particular command by entering HE and the command mnemonic, as listed below. Note Table 5-1.
5 PPCBug Table 5-1.
5 PPCBug Table 5-1.
5 PPCBug ! Caution Although a command to allow the erasing and reprogramming of flash memory is available to you, keep in mind that reprogramming any portion of flash memory will erase everything currently contained in flash, including the PPCBug debugger. Diagnostic Tests The PPCBug hardware diagnostics are intended for testing and troubleshooting the PrPMC800/800ET module. In order to use the diagnostics, you must switch to the diagnostic directory.
5 PPCBug Table 5-2.
6 Modifying the Environment 6 Overview You can use the factory-installed debug monitor, PPCBug, to modify certain parameters contained in the PrPMC800/800ET’s Non-Volatile RAM (NVRAM), also known as Battery Backed-up RAM (BBRAM). NVRAM is located in the last 32K of flash bank A on the PrPMC800/800ET. ❏ The Board Information Block in NVRAM contains various elements concerning operating parameters of the hardware. Use the PPCBug command CNFG to change those parameters.
6 Modifying the Environment System Identifier = “” License Identifier = “xxxxxxx“ The parameters that are quoted are left-justified character (ASCII) strings padded with space characters, and the quotes (“) are displayed to indicate the size of the string. Parameters that are not quoted are considered data strings, and data strings are right-justified. The data strings are padded with zeroes if the length is not met. The Board Information Block is factory-configured before shipment.
6 Modifying the Environment Probe System for Supported I/O Controllers [Y/N] = Y? Y Accesses will be made to the appropriate system buses (e.g., VMEbus, local MPU bus) to determine the presence of supported controllers. (Default) N Accesses will not be made to the VMEbus to determine the presence of supported controllers.
6 Modifying the Environment NVRAM Bootlist (GEV.fw-boot-path) Boot at power-up only [Y/N] = N? Y Give boot priority to devices defined in the fw-boot-path GEV at power-up reset only. N Give power-up boot priority to devices listed in the fw-boot-path GEV at any reset. (Default) NVRAM Bootlist (GEV.fw-boot-path) Boot Abort Delay = 5? The time in seconds that a boot from the NVRAM boot list will delay before starting the boot.
6 Modifying the Environment Auto Boot Abort Delay = 7? The time in seconds that the Autoboot sequence will delay before starting the boot. The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key. The time value is from 0-255 seconds. (Default = 7 seconds) Auto Boot Default String [NULL for an empty string] = ? You may specify a string (filename) which is passed on to the code being booted. The maximum length of this string is 16 characters.
6 Modifying the Environment Refer to the PPCBug Firmware Package User’s Manual for a listing of network controller modules currently supported by PPCBug. (Default = $00) Network Auto Boot Abort Delay = 5? The time in seconds that the NETboot sequence will delay before starting the boot. The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key. The time value is from 0-255 seconds.
6 Modifying the Environment ROM First Access Length (0 - 31) = 10? This is the value programmed into the “ROMFAL” field (Memory Control Configuration Register 8: bits 23-27) to indicate the number of clock cycles used in accessing the ROM. The lowest allowable ROMFAL setting is $00; the highest allowable is $1F. The value to enter depends on processor speed; refer to Chapter 1 or Appendix B for appropriate values. The default value varies according to the system’s bus clock speed.
6 Modifying the Environment imposed by storing the ENV parameters in flash, the Serial Startup codes are disabled for PrPMC800/800ET. The codes are enabled by an ENV parameter: Serial Startup Code Master Enable [Y/N]=N? A line feed can be inserted after each code is displayed to prevent it from being overwritten by the next code.
A Specifications A Specifications This appendix provides general specifications, including mechanical, electrical and thermal specifications, for the PrPMC800/800ET. Mechanical Characteristics The mechanical outline of the PrPMC800/800ET module conforms to the dimensions defined by a single wide, standard length PMC module (74mm x 149mm x 10mm stacking height). The side 2 component height of the PrPMC800/800ET conforms to the standard side 2 height dimension (3.5mm).
A Specifications Environmental Characteristics Table 0-1. PrPMC800/800ET Environmental Specifications Characteristics Specifications Temperature Operating Nonoperating −40° C to 70°C (32° F to 148° F) −40° C to 70°C (32° F to 148° F) Altitude Operating Nonoperating 4,000 meters (13,123 feet) 15,000 meters (49,212 feet) Relative Humidity Operating Nonoperating 5% to 85% (noncondensing) 5% to 95% (noncondensing Vibration Operating Nonoperating 1.0 G sine sweep, 5.0 to 100 Hz, 25 octaves/min 0.
B Thermal Validation B Overview Board component temperatures are affected by ambient temperature, air flow, board electrical operation, and software operation. In order to evaluate the thermal performance of a circuit board assembly, it is necessary to test the board under actual operating conditions. These operating conditions vary depending on system design.
B Thermal Validation The preferred measurement location for a component may be junction, case, or air as specified in the table. Junction temperature refers to the temperature measured by an on-chip thermal device. Case temperature refers to the temperature at the top, center surface of the component. Air temperature refers to the ambient temperature near the component. Table B-1.
B Thermal Validation U2 U6 U3 Q1 Q2 U10 U1 U9 U8 U5 U4 U7 Figure B-1.
B Thermal Validation U15 U20 U21 U22 U23 U24 U19 U16 U14 U26 U25 U17 2934 0401 Figure B-2. Thermally Significant Components (Secondary Side) Component Temperature Measurement The following sections outline general temperature measurement methods. For the specific types of measurements required for thermal evaluation of this board, see Table B-1. Preparation We recommend 40 AWG (American Wire Gauge) thermocouples for all thermal measurements.
B Thermal Validation Measuring Junction Temperature Some components have an on-chip thermal measuring device such as a thermal diode. For instructions on measuring temperatures using the on-board device, refer to the PrPMC800/800ET Programmer’s Reference Guide and to the component manufacturer’s documentation listed in Appendix C, Related Documentation. Measuring Case Temperature Measure the case temperature at the center of the top of the component.
B Thermal Validation Machined groove for thermocouple wire routing Thermocouple junction bonded to component ISOMETRIC VIEW Machined groove for thermocouple wire routing Through hole for thermocouple junction clearance (may require removal of fin material) Also use for alignment guidance during heatsink installation Thermal pad Heatsink base HEATSINK BOTTOM VIEW Figure B-4.
C Related Documentation C Embedded Communications Computing Documents The Motorola publications listed below are referenced in this manual. You can obtain electronic copies of Motorola publications by: ❏ Contacting your local Motorola sales office ❏ Visiting Embedded Communications Computing World Wide Web literature site, http://www.motorola.com/computer/literature. Table C-1.
C Related Documentation Manufacturers’ Documents For additional information, refer to the following table for manufacturers’ data sheets or user’s manuals. As a further help, sources for the listed documents are also provided. Please note that while these sources have been verified, the information is subject to change without notice. Table C-2.
C Related Documentation Related Specifications The next table lists the product’s related specifications. The appropriate source for the listed document is also provided. Please note that in many cases, the information is preliminary and the revision levels of the documents are subject to change without notice. Table C-3. Related Specifications Document Title and Source VITA Publication Number http://www.vita.
Index Numerics 32-bit timers 21 A ABORT# signal 26 abort/reset on debug header 26 adapter cable (Ethernet) 11 adapter cable, serial port 11 address sizes xix ambient temperatures 60 measuring 63 arbitration from Harrier ASIC 19 assembly language 40 asynchronous serial port 22 auto boot configuration parameters 53 autoboot enable 52 B baud rate, debug serial port 11 BDFL (Board Fail) LED 10 big-endian byte ordering xx bits per character, debug serial port 11 board component temperatures 59 board descripti
Index Primary SCSI Data Bus Width 51 ROM Boot Enable 53 SCSI Bus Reset on Debugger Startup 51 Secondary SCSI identifier 51 environmental parameters 49 environmental specifications 58 EREADY signal 26 ESD precautions 7 Ethernet adapter (J3) connector pinouts 35 channel 21 controller 21 port adapter cable 11 power-up configuration information 21 Ethernet, connections 1 evaluating thermal performance xviii, 59 initialization process as performed by firmware 41 on PrPMC 9 installing the PrPMC board 8 INTA#-IN
Index parameter (Primary SCSI Bus Negotiations) 51 parameter (Primary SCSI Data Bus Width) 51 parameter (ROM Boot Enable) 53 parameter (SCSI bus reset on debugger startup) 51 parameter (Secondary SCSI identifier) 51 P parity on debug serial port 11 PCI interface 24 PCI interrupt signals 25 physical dimensions, PrPMC board 57 pin assignments configuration header 5 debug header (J1) 35 Ethernet adapter connector (J3) 35 Harrier power-up configuration header 37 PMC connector P11 29 PMC connector P12 31 PMC c
Index uppercase characters, commands and 47 VPD information, where stored 20 V W validation, thermal 59 voltage requirements 23 PCI signaling 26 PrPMC board 57 Watchdog timers 21 WDT0 timer on Harrier ASIC 21 WDT1 timer on Harrier ASIC 21 word, definition of xix 72 PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
