Personal Computer User Manual

Functional Description
D-4 Computer Group Literature Center Web Site
D
Figure D-1. RAM500 Block Diagram
Bottom-side MVME5100-MEZ Connector
A,
BA,
WE_L,
RAS_L,
CAS_L,
Buffer
LVTH162244
Top-side MVME5100-MEZ Connector
DQMB1
DQ,
CKD
1 Bank of 9 (x8)
SDRAMS
CS_E_L
DQ,
CKD
DQMB0
CS_C_L
DQMB0
CS_C_L
DQMB1
CS_E_L
A,
BA,
WE_L,
RAS_L,
CAS_L,
Note: DQMB1, CS_E_L, A1_SPD,CLK3,4 from Bottom
Connector is routed to Top connector
at the DQMB0, CS_C_L and A0_SPD,CLK1,2 pins.
SROM
SPD
SCL
SDA
SCL
SDA
A1_SPD
A0_SPD
CLK1,2,3,4
CLK1,2
CLK1,2
CLK3,4