Personal Computer User Manual

Features Descriptions
http://www.motorola.com/computer/literature 4-5
4
Processor
The MVME5100 incorporates a BGA foot print that supports both the
MCP7410 and the MCP75x processors. The maximum external processor
bus speed is 100 MHz.
Note The MCP7410 is configured to operate only with the PowerPC
60xbus interface.
System Memory Controller and PCI Host Bridge
The on-board Hawk ASIC provides the bridge function between the
processor’s bus and the PCI bus. It provides 32-bit addressing and 64-bit
data; however, 64-bit addressing (dual address cycle) is not supported. The
ASIC also supports various processor external bus frequencies up to
100 MHz.
There are four programmable map decoders for each direction to provide
flexible address mappings between the processor and the PCI bus. The
ASIC also provides an Multi-Processor Interrupt Controller (MPIC) to
handle various interrupt sources. They are: four MPIC timer interrupts,
interrupts from all PCI devices, and two software interrupts.
Memory
The following subsections describe various memory capabilities on the
MVME5100 including Flash memory and ECC SDRAM memory.
Flash Memory
The MVME5100 contains two banks of Flash memory. Bank B consists of
two 32-pin devices which can be populated with 1MB of Flash memory
(only 8-bit writes are supported for this bank). Refer to the application note
following for more write-protect information on this product.
Bank A has 4 16-bit Smart Voltage FLASH SMT devices. With 32Mbit
flash devices, the flash memory size is 16MB. Note that only 32-bit writes
are supported for this bank of flash memory.