- Texas Instruments Floating Point Digital Signal Processor Specification Sheet
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
18
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
signal groups description (continued)
CE3
ECLKOUT
ED[31:0]
CE2
CE1
CE0
EA[21:2]
BE3
BE2
BE1
BE0
TOUT1
CLKX1
FSX1
DX1
CLKR1
FSR1
DR1
†
CLKS1
†
AOE
/SDRAS/SSOE
AWE/SDWE/SSWE
ARDY
TOUT0
CLKX0
FSX0
DX0
CLKR0
FSR0
DR0
CLKS0
Data
Memory Map
Space Select
Address
Byte Enables
32
20
Memory
Control
EMIF
(External Memory Interface)
Timer 1
Receive Receive
Timer 0
Timers
McBSP1 McBSP0
Transmit Transmit
Clock Clock
McBSPs
(Multichannel Buffered Serial Ports)
TINP1
TINP0
ECLKIN
HOLD
HOLDA
BUSREQ
Bus
Arbitration
ARE/SDCAS/SSADS
†
For proper device operation, these pins must be externally pulled up with a 10-kΩ resistor.
Figure 4. Peripheral Signals