- Texas Instruments Floating Point Digital Signal Processor Specification Sheet

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SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
50
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PLL and PLL controller (continued)
PLLM Register (0x01B7 C110)
31
28 27
24 23 20 19
16
Reserved
R−0
15 12 11
87654321 0
Reserved
PLLM
R−0 R/W−0 0111
Legend: R = Read only, R/W = Read/Write; -n = value after reset
Table 30. PLL Multiplier Control Register (PLLM)
BIT # NAME DESCRIPTION
31:5 Reserved Reserved. Read-only, writes have no effect.
4:0 PLLM
PLL multiply mode [default is x7 (0 0111)].
00000 = Reserved 10000 = x16
00001 = Reserved 10001 = x17
00010 = Reserved 10010 = x18
00011 = Reserved 10011 = x19
00100 = x4 10100 = x20
00101 = x5 10101 = x21
00110 = x6 10110 = x22
00111 = x7 10111 = x23
01000 = x8 11000 = x24
01001 = x9 11001 = x25
01010 = x10 11010 = Reserved
01011 = x11 11011 = Reserved
01100 = x12 11100 = Reserved
01101 = x13 11101 = Reserved
01110 = x14 11110 = Reserved
01111 = x15 11111 = Reserved
PLLM select values 00000 through 00011 and 11010 through 11111 are not supported.