- Texas Instruments Floating Point Digital Signal Processor Specification Sheet
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
67
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PARAMETER MEASUREMENT INFORMATION (CONTINUED)
Table 35. Board-Level Timings Example (see Figure 21)
NO. DESCRIPTION
1 Clock route delay
2 Minimum DSP hold time
3 Minimum DSP setup time
4 External device hold time requirement
5 External device setup time requirement
6 Control signal route delay
7 External device hold time
8 External device access time
9 DSP hold time requirement
10 DSP setup time requirement
11 Data route delay
1
2
3
4
5
6
7
8
10
11
ECLKOUT
(Output from DSP)
ECLKOUT
(Input to External Device)
Control Signals
†
(Output from DSP)
Control Signals
(Input to External Device)
Data Signals
‡
(Output from External Device)
Data Signals
‡
(Input to DSP)
9
†
Control
signals
include
data
for
Writes.
‡
Data
signals
are
generated
during
Reads
from
an
external
device.
Figure 21. Board-Level Input/Output Timings