- Texas Instruments Floating Point Digital Signal Processor Specification Sheet

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   
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
70
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
INPUT AND OUTPUT CLOCKS (CONTINUED)
timing requirements for ECLKIN
†
(see Figure 25)
NO
.
GDPA-167
ZDPA−167
−200
−250
UNIT
MIN MAX
1 t
c(EKI)
Cycle time, ECLKIN 10 ns
2 t
w(EKIH)
Pulse duration, ECLKIN high 4.5 ns
3 t
w(EKIL)
Pulse duration, ECLKIN low 4.5 ns
4 t
t(EKI)
Transition time, ECLKIN 3 ns
†
The reference points for the rise and fall transitions are measured at V
IL
MAX and V
IH
MIN.
ECLKIN
1
2
3
4
4
Figure 25. ECLKIN Timings
switching characteristics over recommended operating conditions for ECLKOUT
द
(see Figure 26)
NO
.
PARAMETER
GDPA-167
ZDPA−167
−200
−250
UNIT
MIN MAX
1 t
c(EKO)
Cycle time, ECLKOUT E − 0.9 E + 0.9 ns
2 t
w(EKOH)
Pulse duration, ECLKOUT high EH − 0.9 EH + 0.9 ns
3 t
w(EKOL)
Pulse duration, ECLKOUT low EL − 0.9 EL + 0.9 ns
4 t
t(EKO)
Transition time, ECLKOUT 2 ns
5 t
d(EKIH-EKOH)
Delay time, ECLKIN high to ECLKOUT high 1 6.5 ns
6 t
d(EKIL-EKOL)
Delay time, ECLKIN low to ECLKOUT low 1 6.5 ns
‡
The reference points for the rise and fall transitions are measured at V
OL
MAX and V
OH
MIN.
§
E = ECLKIN period in ns
¶
EH is the high period of ECLKIN in ns and EL is the low period of ECLKIN in ns.
5
6
1
2
3
ECLKINECLKIN
ECLKOUT
4
4
Figure 26. ECLKOUT Timings