- Texas Instruments Floating Point Digital Signal Processor Specification Sheet


   
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
79
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
SYNCHRONOUS DRAM TIMING (CONTINUED)
ECLKOUT
CEx
BE[3:0]
EA[21:13]
ED[31:0]
EA12
AOE
/SDRAS/SSOE
†
ARE
/SDCAS/SSADS
†
AWE/SDWE/SSWE
†
Bank Activate
Row Address
Row Address
12
5
5
5
1
EA[11:2]
ACTV
12
4
4
4
1
†
ARE
/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
Figure 33. SDRAM ACTV Command
ECLKOUT
CEx
BE[3:0]
EA[21:13, 11:2]
ED[31:0]
EA12
AOE
/SDRAS/SSOE
†
ARE
/SDCAS/SSADS
†
AWE/SDWE/SSWE
†
11
12
5
1
DCAB
11
12
4
1
†
ARE
/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
Figure 34. SDRAM DCAB Command