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_ v1.0

USERS MANUAL

EVB-56x Evaluation & Development Kit for

Motorola PowerPC MPC56x Microcontrollers

 iSYSTEM, February 2003 1/8

Ordering code

EVB-563 ITMPC563

EVB-565 ITMPC565

winIDEA is a trademark of iSYSTEM, GmbH.

All other trademarks used in this document are property of their respective owners.

www.isystem.com

Summary of content (8 pages)

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_ v1.0 USERS MANUAL EVB-56x Evaluation & Development Kit for Motorola PowerPC MPC56x Microcontrollers Ordering code EVB-563 ITMPC563 EVB-565 ITMPC565 Copyright  2003 iSYSTEM, GmbH. All rights reserved. winIDEA is a trademark of iSYSTEM, GmbH. All other trademarks used in this document are property of their respective owners. www.isystem.
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CONTENTS FEATURES ....................................................................................................................... 3 SPECIFICATIONS ............................................................................................................... 3 STANDARD CONFIGURATION ........................................................................................... 3 Options.......................................................................................................................
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Features The EVB56x is an evaluation board for the Motorola series of MPC56x PowerPC microcontrollers. The system is supplied in the package with the on-board MPC56x, 8 Megabit (512 K x 16-Bit) Simultaneous Operation Flash Memory, 4Megabit (256Kx16-Bit) SRAM, debug interfaces, wall plug power source, printed hardware manual and the CD with programming utilities, support software and technical manuals.
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Getting Started Setting up the EVB-56x board Every development board is tested and loaded with a test code. Test application is loaded into internal Flash, which can be erased ca. 100 times. Therefore it is not recommended to burn the Flash too often. EVB-56x with the option M comes with an external memory. The Code is loaded into external Flash to save the internal Flash. a) Ensure, that the Flash enable FLEN jumper is closed for standard board and open for option M.
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Software in the combination with the development board can be used as a basis for developing future applications also on your hardware.
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Memory Banks and Default Memory Map The EVB-56x board provides two memory banks, which can be optionally selected by the MPC5xx microcontroller chip selects. The memory banks are the SRAM (U6)and Simultaneous Operation Flash EPROM (U5). Since the MPC5xx chip selects are fully programmable (with the exception of CS0 providing external Reset start-up) the banks can be located at any location in the MPC5xx memory space.
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limited number of Flash erase cycles in the microcontroler (up to 100) it is recommended to use external flash memory for development process. This memory can be used together with the boot code for power on initialization. Programming the Flash memory winIDEA allows you to load code directly into internal or external Flash memory. You have to set memory map in your code accordingly with the target configuration. Demo software has the examples configured for both cases.
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BDM Debug Port 1 2 9 10 Signal Name EVB565 VFLS0 SRESET* GND DSCK GND VFLS1 HRESET* DSDI +3.3V DSDO Pin 1 2 3 4 5 6 7 8 9 10 The development tool (iC3000 for example) selects the port automatically. BDM port is configured after HRESET* transition when the DSCK signal is high. Eight clocks after the MPU samples the DSDI signal to select the mode (high – asynchronous). NEXUS Debug Port Pin 1 2 3 4 5 6 7 8 9 10 Signal Name +2.6V +2.6V KAPWR NC NC NC HRESET* +2.