Datasheet

Table 18. Package C-States and Display Resolutions
PSR Number of Displays
1
Native Resolution
2
Deepest Available
Package C-State
Disabled Single
3200x1800 60 Hz and
lower resolutions with
refresh rate 60 Hz or less
PC7_PLUS
Disabled Single 3200x2000 60 Hz PC7_PLUS or PC7
Disabled Single 3840x2160 30 Hz PC7_PLUS
Disabled Single 4096x2160 24 Hz PC7_PLUS
Disabled Single 3840x2160 60 Hz PC6
Disabled Single 4096x2304 60 Hz
4
PC6
Disabled Multiple
1920x1200 60 Hz and
lower resolutions with
refresh rate 60 Hz or less
PC7_PLUS
Disabled Multiple 2048x1536 60 Hz PC7
Disabled Multiple 2560x1600 60 Hz PC6
Disabled Multiple 2560x1920 60 Hz PC6
Disabled Multiple 2880x1620 60 Hz PC6
Disabled Multiple 3200x1800 60 Hz PC6 or PC3
Disabled Multiple 3200x2000 60 Hz PC3
Disabled Multiple 3840x2160 30 Hz PC6
Disabled Multiple 4096x2160 24 Hz PC6
Disabled Multiple 3840x2160 60 Hz PC3
Disabled Multiple 4096x2304 60 Hz
4
PC3 or PC2
Enabled Single
3
Any resolution PC7_PLUS
Notes: 1. For multiple display cases, the resolution listed is the highest native resolution of all enabled
displays; that is, dual display with one 1920x1200 60 Hz display and one 3200x2000 60 Hz
display will result in a deepest available package C-state of PC3.
2. For non-native resolutions, the deepest available package C-State will be somewhere between
that of the native resolution and the non-native resolution; that is, a non-PSR, single display,
native 4096x2304 60 Hz panel using non-native 1920x1080 60 Hz resolution will result in a
deepest available package C-State between PC6 and PC7_PLUS.
3. PSR is internally disabled when multiple displays are enabled. Thus, the result for multiple
displays with PSR enabled is the same as with PSR disabled.
4. Resolution not supported by Intel
®
Core
™
M processor family.
These screen resolutions are examples using common values for blanking and pixel
rate. Actual results will vary.
This information shows the deepest possible Package C-state. System workload,
system idle, and AC or DC power also affect the deepest possible Package C-state.
Integrated Memory Controller (IMC) Power Management
The main memory is power managed during normal operation and in low-power ACPI
Cx states.
4.3
Processor—Power Management
5th Generation Intel
®
Core
™
Processor Family, Intel
®
Core
™
M Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and
Mobile Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2 March 2015
54 Order No.: 330834-004v1